ST7789V2 datasheet(66/319 Pages) SITRONIX

66 / 319 page

ST7789V2

Version 1.0

Page 66 of 319

2016/11

Sitronix Confidential

The information contained herein is the exclusive property of Sitronix and shall not be distributed, reproduced, or

disclosed in whole or in part without prior written permission of Sitronix.

8.5

Data Transfer Break and Recovery

If there is a break in data transmission by RESX pulse, while transferring a command or frame memory

data or multiple parameter command data, before Bit D0 of the byte has been completed, then driver will

reject the previous bits and have reset the interface such that it will be ready to receive command data again

when the chip select line (CSX) is next activated after RESX have been HIGH state.

If there is a break in data transmission by CSX pulse, while transferring a command or frame memory

data or multiple parameter command data, before Bit D0 of the byte has been completed, then driver will

reject the previous bits and have reset the interface such that it will be ready to receive the same byte

re-transmitted when the chip select line (CSX) is next activated.

If 1, 2 or more parameter commands are being sent and a break occurs while sending any parameter

before the last one and if the host then sends a new command rather than re-transmitting the parameter that

was interrupted, then the parameters that were successfully sent are stored and the parameter where the

break occurred is rejected. The interface is ready to receive next byte as shown below.

Figure 20 Write interrupts recovery (serial interface)

If a 2 or more parameter commands are being sent and a break occurs by the other command before the

last one is sent, then the parameters that were successfully sent are stored and the other parameter of that

command remains previous value.

ST7789V2 Datasheet(PDF) 66 Page - Sitronix Technology Co., Ltd.