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AD5360 Datasheet(PDF) 15 Page - Analog Devices

Part # AD5360
Description  16-Channel, 16/14-Bit, Serial Input, Voltage-Output DAC
PDF  25 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5360 Datasheet(HTML) 15 Page - Analog Devices

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Preliminary Technical Data
AD5360/AD5361
Rev. P
rF | Page 15 of 25
values. Note that VDD and VSS must provide sufficient
headroom.
5.
Calculate the value of VREF as follows:
VREF = (VOUTMAX – VOUTMIN)/4
Reference Selection Example
Nominal Output Range = 20V (-10V to +10V)
Offset Error = ±100mV
Gain Error = ±3%
SIGGND = AGND = 0V
1)
Gain Error = ±3%
=> Maximum Positive Gain Error = +3%
=> Output Range incl. Gain Error = 20 + 0.03(20)=20.6V
2)
Offset Error = ±100mV
=> Maximum Offset Error Span = 2(100mV)=0.2V
=> Output Range including Gain Error and Offset Error =
20.6V + 0.2V = 20.8V
3)
VREF Calculation
Actual Output Range = 20.6V, that is -10.3V to +10.3V
(centered);
VREF = (10.3V + 10.3V)/4 = 5.15V
If the solution yields an inconvenient reference level, the user
can adopt one of the following approaches:
1.
Use a resistor divider to divide down a convenient,
higher reference level to the required level.
2.
Select a convenient reference level above VREF and
modify the Gain and Offset registers to digitally
downsize the reference. In this way the user can use
almost any convenient reference level but may reduce
the performance by overcompaction of the transfer
function.
3.
Use a combination of these two approaches
CALIBRATION
The user can perform a system calibration on the AD5360 and
AD5361 to reduce gain and offset errors to below 1 LSB. This is
achieved by calculating new values for the M and C registers and
reprogramming them.
Reducing Zero-scale and Full-scale Error
Zero-scale error can be reduced as follows:
1.
Set the output to the lowest possible value.
2.
Measure the actual output voltage and compare it with the
required value. This gives the zero-scale error.
3.
Calculate the number of LSBs equivalent to the
error and subtract this from the default value of
the C register. Note that only negative zero-scale error can
be reduced.
Full-scale error can be reduced as follows:
1.
Measure the zero-scale error.
2.
Set the output to the highest possible value.
3.
Measure the actual output voltage and compare it with the
required value. Add this error to the zero-scale error. This
is the full-scale error.
4.
Calculate the number of LSBs equivalent to the full-scale
error and subtract it from the default value of the M
register. Note that only positive full-scale error can be
reduced.
5.
The M and C registers should not be programmed until
both zero-scale and full-scale errors have been calculated.
AD5360 CALIBRATION EXAMPLE
This example assumes that a −10 V to +10 V output is required.
The DAC output is set to −10 V but measured at −10.03 V. This
gives an zero-scale error of −30 mV.
1.
1 LSB = 20 V/65536 = 305.176 µV
2.
30 mV = 98 LSB
3.
98 LSB should be added to the default C register value:
(32768 + 98) = 32866
4.
32866 should be programmed to the C register
The full-scale error can now be removed. The output is set to
+10 V and a value of +10.02 V is measured. The full-scale error
is +20 mV – (–30 mV) = +50 mV
This is a full-scale error of +50 mV.
1.
50 mV = 164 LSBs
2.
164 LSB should be subtracted from the default M register
value: (65535 − 164) = 65371
3.
65371 should be programmed to the M register
RESET FUNCTION
When the RESET pin is taken low, the DAC buffers are
disconnected and the DAC outputs VOUT0 to VOUT15 are
tied to their associated SIGGND signals via a 10 kΩ resistor. On
the rising edge of RESET the AD5360/AD5361 state machine
initiates a reset sequence to reset the X, M and C registers to
their default values. This sequence typically takes 300µs and the
user should not write to the part during this time. When the
reset sequence is complete, and provided that CLR is high, the



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