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EVAL-AD1938EB Datasheet(PDF) 28 Page - Analog Devices |
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EVAL-AD1938EB Datasheet(HTML) 28 Page - Analog Devices |
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28 / 30 page ![]() AD1935/AD1936/AD1937/AD1938/AD1939 Preliminary Technical Data Rev. Pr I | Page 28 of 30 ADC control 2 Bit Value Function Description 0 0 1 50/50 (allows 32/24/20/16 BCLK/channel) Pulse (32 BCLK/channel) LRCLK Format 1 0 1 Drive out on falling edge (DEF) Drive out on rising edge BCLK Polarity 2 0 1 Left Low Left High LRCLK Polarity 3 0 1 Slave Master LRCLK Master/Slave 5:4 00 01 10 11 64 128 256 512 BCLKs per frame 6 0 1 Slave Master BCLK Master/Slave 7 0 1 ABCLK pin Internally generated BCLK Source Table 27 |
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