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EVAL-AD1938EB Datasheet(PDF) 18 Page - Analog Devices

Part # EVAL-AD1938EB
Description  4 ADC/8 DAC with PLL, 192 kHz, 24 Bit CODEC
PDF  30 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

EVAL-AD1938EB Datasheet(HTML) 18 Page - Analog Devices

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AD1935/AD1936/AD1937/AD1938/AD1939
Preliminary Technical Data
Rev. Pr
I | Page 18 of 30
Pin No.
In/Out
Mnemonic
Description
52
O
CM
Common Mode Reference Filter Capacitor Connection. Bypass with 10 µF||100 nF to AGND.
53
I
ADC1LP
ADC1 Left Positive Input.
54
I
ADC1LN
ADC1 Left Negative Input.
55
I
ADC1RP
ADC1 Right Positive Input.
56
I
ADC1RN
ADC1 Right Negative Input.
57
I
ADC2LP
ADC2 Left Positive Input.
58
I
ADC2LN
ADC2 Left Negative Input.
59
I
ADC2RP
ADC2 Right Positive Input.
60
I
ADC2RN
ADC2 Right Negative Input.
61
O
LF
PLL Loop Filter, Return to AVDD.
62
I
AVDD
Analog Power Supply. Connect to analog 3.3 V supply.
63
No Connect.
64
No Connect.
Table 14. Pin Function Description—64-Lead LQFP (AD1937, AD1939)
64-Lead LQFP Plastic Package – AD1935
Pin No.
In/Out
Mnemonic
Description
1
I
AGND
Analog Ground.
2
I
MCLKI/XI
Master Clock Input/ Crystal Oscillator Input.
3
I
MCLK/XO
Master Clock Output/ Crystal Oscillator Output.
4
I
AGND
Analog Ground.
5
I
AVDD
Analog Power Supply. Connect to analog 3.3 V supply.
6
O
OL3
DAC 3 Left Output.
7
O
No Connect.
8
O
OR3
DAC 3 Right Output.
9
O
No Connect.
10
O
OL4
DAC 4 Left Output.
11
O
No Connect.
12
O
OR4
DAC 4 Right Output.
13
O
No Connect.
14
I
PD/RST
Power-Down Reset (Active Low).
15
I
DSDATA4
DAC Input 4 (Input to DAC 4 L and R).
16
I
DGND
Digital Ground.
17
I
DVDD
Digital Power Supply. Connect to digital 3.3 V supply.
18
I
DSDATA3
DAC Input 3 (Input to DAC 3 L and R).
19
I
DSDATA2
DAC Input 2 (Input to DAC 2 L and R).
20
I
DSDATA1
DAC Input 1 (Input to DAC 1 L and R).
21
I/O
DBCLK
Bit Clock for DACs.
22
I/O
DLRCLK
LR Clock for DACs.
23
VSUPPLY
+5V Input to Regulator, Emitter of Pass Transistor
24
VSENSE
+3.3V Output of Regulator, Collector of Pass Transistor
25
VDRIVE
Drive for Base of Pass Transistor
26
O
ASDATA2
ADC Serial Data Output 2 (ADC 2 L and R).
27
O
ASDATA1
ADC Serial Data Output 1 (ADC 1 L and R).
28
I/O
ABCLK
Bit Clock for ADCs.
29
I/O
ALRCLK
LR Clock for ADCs.
30
I
CIN
Control Data Input (SPI)
31
I/O
COUT
Control Data Output (SPI)
32
I
DVDD
Digital Power Supply. Connect to digital 3.3 V supply.
33
I
DGND
Digital Ground.
34
I
CCLK
Control Clock Input (SPI)
35
I
CLATCH
Latch Input for Control Data (SPI)



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