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EVAL-AD1938EB Datasheet(PDF) 14 Page - Analog Devices

Part # EVAL-AD1938EB
Description  4 ADC/8 DAC with PLL, 192 kHz, 24 Bit CODEC
PDF  30 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

EVAL-AD1938EB Datasheet(HTML) 14 Page - Analog Devices

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AD1935/AD1936/AD1937/AD1938/AD1939
Preliminary Technical Data
Rev. Pr
I | Page 14 of 30
LRCLK
BCLK
DATA
SLOT 1
LEFT 1
SLOT 2
RIGHT 1
SLOT 5
RIGHT 2
SLOT 6
32 BCLKs
MSB
MSB–1
MSB–2
256 BCLKs
SLOT 3 SLOT 4
SLOT 7 SLOT 8
LRCLK
BCLK
DATA
LEFT 2
LRCLK
BCLK
DATA
SLOT 1
LEFT 1
SLOT 2
RIGHT 1
SLOT 5
RIGHT 2
SLOT 6
32 BCLKs
MSB
MSB–1
MSB–2
256 BCLKs
SLOT 3 SLOT 4
SLOT 7 SLOT 8
LRCLK
BCLK
DATA
LEFT 2
Figure 16. ADC TDM (8-channel I2Smode )
LRCLK
BCLK
DATA
SLOT 1
LEFT 1
SLOT 2
RIGHT 1
SLOT 5
RIGHT 2
SLOT 6
32 BCLKs
MSB
MSB–1
MSB–2
256 BCLKs
SLOT 3 SLOT 4
SLOT 7 SLOT 8
LRCLK
BCLK
DATA
LEFT 2
RIGHT 3
LEFT 3
RIGHT 4
LEFT 4
LRCLK
BCLK
DATA
SLOT 1
LEFT 1
SLOT 2
RIGHT 1
SLOT 5
RIGHT 2
SLOT 6
32 BCLKs
MSB
MSB–1
MSB–2
256 BCLKs
SLOT 3 SLOT 4
SLOT 7 SLOT 8
LRCLK
BCLK
DATA
LEFT 2
RIGHT 3
LEFT 3
RIGHT 4
LEFT 4
Figure 17. DAC TDM (8-channel I2S mode)
FSTDM
ADC L1
ADC R1
ADC L2
ADC R2
AUX ADC L1
AUX ADC R1
AUX ADC L2
AUX ADC R2
DAC L1
DAC R1
DAC L2
DAC L3
DAC R3
DAC L4
MSB TDM
1ST
CH
LEFT
RIGHT
I2S- MSB RIGHT
I2S- MSB LEFT
BCLK
TDM
ASDATA1
TDM (OUT)
ASDATA
DSDATA1
TDM (IN)
DSDATA1
AUX LRCLK
(FROM AUX ADC 1)
AUX BCLK
(FROM AUX ADC 1)
AUX DATA IN 1
(FROM AUX ADC 1)
AUX DATA IN 2
(FROM AUX ADC 2)
AUX BCLK FREQUENCY IS 64
× FRAME-RATE; TDM BCLK FREQUENCY IS 256 × FRAME-RATE.
MSB TDM
8TH
CH
32
32
MSB TDM
1ST
CH
MSB TDM
8TH
CH
I2S- MSB RIGHT
I2S- MSB LEFT
DAC R2
DAC R4
Figure 18. AUX 256 Mode Timing (Note that the Clocks Are Not to Scale)



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