CS5535 datasheet(453/555 Pages) NSC

453 / 555 page

Revision 0.8

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GPIO Subsystem Register Descriptions (Continued)

GPIO High Bank Lock Enable (GPIOH_LOCK_EN)

GPIO I/O Offset

BCh

Type

R/W

Reset Value

00000000h

GPIOH_LOCK_EN Register Map

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

9876543210

RSVD

GPIOH_LOCK_EN Bit Descriptions

Bit

Name

Description

31:15

RSVD

Reserved. Write to 0.

LKNE

Lock GPIOH_IN_NEGEDGE_ENA. When set, writing to the GPIO Low Bank Input

Negative Edge Enable register (GPIO I/O Offset C4h) is prevented.

LKPE

Lock GPIOH_IN_POSEDGE_EN. When set, writing to the GPIO Low Bank Input Posi-

tive Edge Enable register (GPIO I/O Offset C0h) is prevented.

LKIP

Lock GPIOH_EVENTS_EN. When set, writing to the GPIO Low Bank Events Enable

(interrupts &PMEs) register (GPIO I/O Offset B8h) is prevented.

LKIA

Lock GPIOH_IN_AUX1_SEL. When set, writing to the GPIO Low Bank Input Auxiliary

1 Select register (GPIO I/O Offset B4h) is prevented.

LKEE

Lock GPIOH_IN_EVNTCNT_EN. When set, writing to the GPIO Low Bank Input Event

Count Enable register (GPIO I/O Offset ACh) is prevented.

LKFE

Lock GPIOH_IN_FLTR_EN. When set, writing to the GPIO Low Bank Input Filter

Enable register (GPIO I/O Offset A8h) is prevented.

9LKII

Lock GPIOH_IN_INVRT_EN. When set, writing to the GPIO Low Bank Input Invert

Enable register (GPIO I/O Offset A4h) is prevented.

8LKIE

Lock GPIOH_IN_EN. When set, writing to the GPIO Low Bank Input Enable register

(GPIO I/O Offset A0h) is prevented.

LKPD

Lock GPIOH_PD_EN. When set, writing to the GPIO Low Bank Pull-Down Enable reg-

ister (GPIO I/O Offset 9Ch) is prevented.

LKPU

Lock GPIOH_PU_EN. When set, writing to the GPIO Low Bank Pull-Up Enable regis-

ter (GPIO I/O Offset 98h) is prevented.

LKA2

Lock GPIOH_OUT_AUX2_SEL. When set, writing to the GPIO Low Bank Output Aux-

iliary 2 Select register (GPIO I/O Offset 94h) is prevented.

LKA1

Lock GPIOH_OUT_AUX1_SEL. When set, writing to the GPIO Low Bank Output Aux-

iliary 1 Select register (GPIO I/O Offset 90h) is prevented.

3LKOI

Lock GPIOH_OUT_INVRT_EN. When set, writing to the GPIO Low Bank Output Invert

Enable register (GPIO I/O Offset 8Ch) is prevented.

2LKOD

Lock GPIOH_OUT_OD_EN. When set, writing to the GPIO Low Bank Output Open-

Drain Enable register (GPIO I/O Offset 88h) is prevented.

1LKOE

Lock GPIOH_OUTPUT_ENABLE. When set, writing to the GPIO Low Bank Enable

0LKOV

Lock GPIOH_OUTPUT_VALUE. When set, writing to the GPIO Low Bank Output

Value register (GPIO I/O Offset 80h) is prevented.

CS5535 Datasheet(PDF) 453 Page - National Semiconductor (TI)

CS5535 Datasheet(HTML) 453 Page - National Semiconductor (TI)

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