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CS5535 Datasheet(PDF) 533 Page - National Semiconductor (TI) |
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CS5535 Datasheet(HTML) 533 Page - National Semiconductor (TI) |
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533 / 555 page  Revision 0.8 533 www.national.com Electrical Specifications (Continued) 6.3.2 Reset and Test Inputs Table 6-8. Reset and Test Timing Parameters Signal Parameter Min Max Units Comment/Condition RESET_WORK# Rise/Fall Time 0.5 5 ns Note 1. Low Time 3 None ns Time required to detect a reset. High Time 3 None ns Cycle Time does not apply. Once the component has started a reset operation, cycling this input generally does not apply. RESET_STAND# Rise/Fall Time 0.5 5 ns Note 1. Low Time 3 None ns Time required to detect a reset. High Time 3 None ns Cycle Time does not apply. Once the component has started a reset operation, cycling this input generally does not apply. LVD_EN# Static signal. Tie high or low as indicated in the signal description. TEST_MODE Static signal. Operationally, always tie low. FUNC_TEST Static signal. Operationally, always tie low. Note 1. Signal parameters are defined in Figure 6-1 "Clock Reference Definition" on page 530. |
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