MPQ3324

– 8-CH LED DRIVER WITH I2C AND PWM AND ANALOG DIMMING, AEC-Q100

MPQ3324 Rev. 1.0

MonolithicPower.com

12

2/18/2021

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Table 1: RFSH/FLT Pin Output Status

FLTEN

RFSH/FLT Pin Output

FRFSH9:0 = 0x000

FRFSH9:0 = 0x001~0x3FF

No fault

condition

Fault

condition

No fault

condition

Fault condition

1

Externally

pulled high

Low

Rectangle

signal

Low

0

Externally pulled high

Rectangle signal

The refresh signal frequency is set by FRFSH9:0.

If FRFSH9:0 = 0x000, then the RFSH/FLT pin

outputs high. If FRFSH9:0 = 0x001~0x3FF, the

RFSH/FLT pin outputs a rectangle signal. The

refresh

frequency

can

be

calculated

with

Equation (3):

127500

REFRESH

f

FRFSH9:0



(3)

Note that if FPWM1:0 = 01, the PWM dimming

frequency is 250Hz. If FRFSH9:0 = 0x000, the

RFSH/FLT pin outputs high.

The refresh frequency is also related to the PWM

dimming frequency, estimated with Equation (4):

127500

250

PWM

REFRESH

f

f

=

(Hz)

FRFSH



(4)

Where fREFRESH is the refresh frequency, FRFSH

is the value of FRFSH9:0, and fPWM is PWM

dimming frequency set by register FPWM1:0 (it

can be either 200Hz, 250Hz, 280Hz, or 330Hz).

For this equation, FRFSH9:0 > 0.

Note that all numbers in the equation have a

decimal base, and that the refresh frequency

does not change until the 8MSB are written.

The internal oscillator is divided by 8. As the

clock refreshes the frequency generation, the

FRFSH9:0 register sets the counter number (see

Figure 5).

OSC

OSC = 1.02MHz

Default

1/8

Counter

I

2C

FRFSH9:0

MPQ3324

FPWM1:0

250Hz

Default

RFSH/

FLT

SDA

SCL

Figure 5: Refresh Frequency Generation

LED Current Slew Rate Control

Changing the LED current

’s rising/falling slew

rate during PWM dimming can optimize EMI

performance. The LED current rising/falling slew

rate is controlled by SLEW1:0. The slew rate can

be set to the values listed below:

 SLEW1:0 = 00: no slew rate

 SLEW1:0 = 01: 5µs

 SLEW1:0 = 10: 10µs

 SLEW1:0 = 11: 20µs

Protections

The MP3324 employs VIN under-voltage lockout

(UVLO), LED short protection, LED open-load

protection, and thermal shutdown.

The RFSH/FLT pin is active low, open drain, and

should be pulled high to an external voltage

source.

If

a

protection

is

triggered,

the

corresponding fault bit is set, and RFSH/FLT is

pulled low.

In hiccup mode, the RFSH/FLT pin is pulled high

once the fault condition is removed.

In latch-off mode, the RFSH/FLT pin is released

if all of fault bits are read.

For LED open and short protection, hiccup mode

or latch-up mode can be selected via the LATCH

bit through the I2C.

If LATCH = 1, the MPQ3324 initiates latch-up

mode if a fault is triggered. The fault channel

stays off until VIN or EN is turned off and reset.

If LATCH = 0, the MPQ3324 operates in hiccup

mode. In this mode, the fault channel tries to

conduct for 32

μs to detect if the fault is cleared.

This process is repeated every 1ms. RFSH/FLT

is released if fault condition is removed.