MCP19116 datasheet(94/246 Pages) MICROCHIP

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MCP19116/7

DS20005479D-page 94

 2015-2020 Microchip Technology Inc.

12.2

Code Protection

Code protection allows the device to be protected from

unauthorized access. Internal access to the program

memory is unaffected by any code protection setting.

12.2.1

PROGRAM MEMORY PROTECTION

The entire program memory space is protected from

external reads and writes by the CP bit in the

Configuration Word. When CP = 0, external reads and

writes of program memory are inhibited and a read will

return all ‘0’s. The CPU can continue to read program

memory, regardless of the protection bit settings.

Writing the program memory is dependent upon the

write protection setting. Refer to Section 12.3 “Write

Protection” for more information.

12.3

Write Protection

Write protection allows the device to be protected from

unintended self-writes. Applications, such as boot

loader software, can be protected while allowing other

regions of the program memory to be modified.

The WRT<1:0> bits in the Configuration Word define

the size of the program memory block that is protected.

12.4

ID Locations

Four memory locations (2000h-2003h) are designated

as ID locations where the user can store checksum or

other code identification numbers. These locations are

not accessible during normal execution but are

readable and writable during Program/Verify mode.

Only the Least Significant 7 bits of the ID locations are

reported when using MPLAB Integrated Development

Environment (IDE).

MCP19116 Datasheet(PDF) 94 Page - Microchip Technology