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AM69 Datasheet(PDF) 89 Page - Texas Instruments

Part # AM69
Description  AM69x Processors, Silicon Revision 1.0
PDF  300 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

AM69 Datasheet(HTML) 89 Page - Texas Instruments

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Table 6-5. DDRSS0 Signal Descriptions (continued)
SIGNAL NAME [1] ((2))
PIN TYPE [2]
DESCRIPTION [3]
ALY PIN [4]
DDR0_DQ9
IO
DDRSS Data
W3
DDR0_DQ10
IO
DDRSS Data
AA3
DDR0_DQ11
IO
DDRSS Data
W2
DDR0_DQ12
IO
DDRSS Data
AA6
DDR0_DQ13
IO
DDRSS Data
Y4
DDR0_DQ14
IO
DDRSS Data
Y5
DDR0_DQ15
IO
DDRSS Data
AA7
DDR0_DQ16
IO
DDRSS Data
AF2
DDR0_DQ17
IO
DDRSS Data
AE7
DDR0_DQ18
IO
DDRSS Data
AG3
DDR0_DQ19
IO
DDRSS Data
AF5
DDR0_DQ20
IO
DDRSS Data
AE6
DDR0_DQ21
IO
DDRSS Data
AF4
DDR0_DQ22
IO
DDRSS Data
AE3
DDR0_DQ23
IO
DDRSS Data
AE4
DDR0_DQ24
IO
DDRSS Data
AG5
DDR0_DQ25
IO
DDRSS Data
AH3
DDR0_DQ26
IO
DDRSS Data
AJ2
DDR0_DQ27
IO
DDRSS Data
AH4
DDR0_DQ28
IO
DDRSS Data
AJ4
DDR0_DQ29
IO
DDRSS Data
AH6
DDR0_DQ30
IO
DDRSS Data
AH7
DDR0_DQ31
IO
DDRSS Data
AG6
DDR0_DQS0N
IO
DDRSS Complimentary Data Strobe
V1
DDR0_DQS0P
IO
DDRSS Data Strobe
U1
DDR0_DQS1N
IO
DDRSS Complimentary Data Strobe
Y1
DDR0_DQS1P
IO
DDRSS Data Strobe
AA1
DDR0_DQS2N
IO
DDRSS Complimentary Data Strobe
AE1
DDR0_DQS2P
IO
DDRSS Data Strobe
AF1
DDR0_DQS3N
IO
DDRSS Complimentary Data Strobe
AH1
DDR0_DQS3P
IO
DDRSS Data Strobe
AJ1
(1)
An external 240 Ω ±1% resistor must be connected between this pin and VSS. No external voltage should be applied to this pin.
(2)
DDRSS0, DDRSS1, DDRSS2, and DDRSS3 must always be used in incremental order. For instance, when using a single LPDDR
component, it must be connected to the DDR0_* interface. When using two LPDDR components, they must be connected to DDR0_*
and DDR1_* interfaces, and so forth.
Table 6-6. DDRSS1 Signal Descriptions
SIGNAL NAME [1] ((2))
PIN TYPE [2]
DESCRIPTION [3]
ALY PIN [4]
DDR1_CKN
IO
DDRSS Differential Clock (negative)
A11
DDR1_CKP
IO
DDRSS Differential Clock (positive)
B10
DDR1_RESETn
IO
DDRSS Reset
G10
DDR1_RET
I
DDR Retention Enable
G8
DDR1_CA0
IO
DDRSS Command Address
F12
DDR1_CA1
IO
DDRSS Command Address
C12
DDR1_CA2
IO
DDRSS Command Address
B12
DDR1_CA3
IO
DDRSS Command Address
C11
DDR1_CA4
IO
DDRSS Command Address
D12
www.ti.com
AM69A, AM69
SPRSP92A – FEBRUARY 2023 – REVISED AUGUST 2023
Copyright © 2023 Texas Instruments Incorporated
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Product Folder Links: AM69A AM69



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