MPQ8112/MPQ8112A

– 60V, HIGH-SIDE, CURRENT-SENSE AMPLIFIER

MPQ8112/MPQ8112A Rev. 1.0

www.MonolithicPower.com

5

7/7/2020

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© 2020 MPS. All Rights Reserved.

ELECTRICAL CHARACTERISTICS

VCC = 12V, VRG1 = 12V, TA = -40°C to +125°C, typical values at TJ = 25°C. RG1 = RG2 = 0Ω, and ROUT

not used for the MPQ8112. RG1 = RG2 = 1kΩ, and ROUT = 10kΩ for the MPQ8112A. All unless

otherwise noted.

Parameter

Symbol

Conditions

Min

Typ

Max

Units

Supply voltage

VCC

2.7

60

V

Common mode input

voltage

VCM

0

VCC

V

V5 supply voltage

V5

2.7

5.5

V

Supply current

ICC + IV5

VSENSE = 0, VCC = 60V, V5 = 5V

300

360

µA

Common mode input

rejection (6)

CMR

VSENSE = 100mV, VCC = 60V,

VCM1 = 60V, VCM2 = 22V

65

90

dB

Full-scale sense voltage

VSENSE

VSENSE = VRG1 - VRG2

200

mV

Input offset voltage (7)

VOS

VCM = 12V, VSENSE1 = 100mV,

VSENSE2 = 20mV

0.3

1

mV

Input bias current

IRG1, IRG2

VCM = 12V

0.25

1

µA

Current-sense gain

GM

TJ = 25°C

4.95

5

5.05

A/A

TJ = -40°C to +125°C

4.9

5

5.1

Output voltage gain

AV

MPQ8112, VSENSE = 100mV,

VCM = 12V, TJ = 25°C

49.5

50

50.5

V/V

MPQ8112, VSENSE = 100mV,

VCM = 12V, TJ = -40°C to +125°C

49

50

51

Bandwidth (8)

BW

COUT = 5pF

700

kHz

Power supply rejection

ratio (9)

PSRR

VCC1 = 60V, VCC2 = 2.7V,

VSENSE = 24mV

70

80

dB

V5 upper threshold

voltage

VTH_UPPER

1.3

2

2.5

V

V5 lower threshold

voltage

VTH_LOWER

1.2

1.9

2.4

V

V5 shutdown supply

current

ICC(SHDN)

V5 = 1V

0.2

2

µA

Output respond time (8)

RG1 = RG2 = 1k

Ω, ROUT = 10kΩ,

VSENSE = 5mV to 100mV,

VOUT from 10% to 90%

500

ns

RG1 = RG2 = 1k

Ω, ROUT = 10kΩ,

VSENSE = 100mV to 5mV,

VOUT from 10% to 90%

500

Notes:

6) CMR = 20 x log[(VCM1 - VCM2) / (VOUT1 - VOUT2)]. VOUT1 is the output voltage at VCM1, and VOUT2 is the output voltage at VCM2.

7) VOS = VSENSE1 - VOUT1 / [(VOUT1 - VOUT2) / (VSENSE1 - VSENSE2)]. VOUT1 is the output voltage at VSENSE1, and VOUT2 is the output voltage at VSENSE2.

8) Not tested in production. Guaranteed by design and characterization.

9) PSRR = 20 x log[(VCC1 - VCC2) / (VOUT1 - VOUT2)]. VOUT1 is the output voltage at VCC1, and VOUT2 is the output voltage at VCC2.