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AT32AP7002 Datasheet(PDF) 2 Page - ATMEL Corporation |
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AT32AP7002 Datasheet(HTML) 2 Page - ATMEL Corporation |
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2 / 45 page ![]() 2 32054AS-AVR32-02/07 AT32AP7002 1. Part Description The AT32AP7002 is a complete System-on-chip application processor with an AVR32 RISC processor achieving 210 DMIPS running 150 MHz. AVR32 is a high-performance 32-bit RISC microprocessor core, designed for cost-sensitive embedded applications, with particular empha- sis on low power consumption, high code density and high application performance. AT32AP7002 implements a Memory Management Unit (MMU) and a flexible interrupt controller supporting modern operating systems and real-time operating systems. The processor also includes a rich set of DSP and SIMD instructions, specially designed for multimedia and telecom applications. AT32AP7002 incorporates SRAM memories on-chip for fast and secure access. For applica- tions requiring additional memory, external 16-bit SRAM is accessible. Additionally, an SDRAM controller provides off-chip volatile memory access as well as controllers for all industry standard off-chip non-volatile memories, like Compact Flash, Multi Media Card (MMC), Secure Digital (SD)-card, SmartCard, NAND Flash and Atmel DataFlash™. The Direct Memory Access controller for all the serial peripherals enables data transfer between memories without processor intervention. This reduces the processor overhead when transfer- ring continuous and large data streams between modules in the MCU. The Timer/Counters includes three identical 16-bit timer/counter channels. Each channel can be independently programmed to perform a wide range of functions including frequency measure- ment, event counting, interval measurement, pulse generation, delay timing and pulse width modulation. AT32AP7002 also features an onboard LCD Controller, supporting single and double scan monochrome and color passive STN LCD modules and single scan active TFT LCD modules. On monochrome STN displays, up to 16 gray shades are supported using a time-based dither- ing algorithm and Frame Rate Control (FRC) method. This method is also used in color STN displays to generate up to 4096 colors. The LCD Controller is programmable for supporting resolutions up to 2048 x 2048 with a pixel depth from 1 to 24 bits per pixel. A pixel co-processor provides color space conversions for images and video, in addition to a wide variety of hardware filter support The media-independent interface (MII) and reduced MII (RMII) 10/100 Ethernet MAC modules provides on-chip solutions for network-connected devices. Synchronous Serial Controllers provide easy access to serial communication protocols, audio standards like AC'97, I2S, I2C© and various SPI modes. The modules support frame-based pro- tocols, like VoIP SIP protocols. The Java hardware acceleration implementation in AVR32 allows for a very high-speed Java byte-code execution. AVR32 implements Java instructions in hardware, reusing the existing RISC data path, which allows for a near-zero hardware overhead and cost with a very high performance. The Image Sensor Interface supports cameras with up to 12-bit data buses and connects directly to the LCD interface through a separate bus. PS2 connectivity is provided for standard input devices like mice and keyboards. |
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