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AT43USB325 Datasheet(PDF) 25 Page - ATMEL Corporation |
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AT43USB325 Datasheet(HTML) 25 Page - ATMEL Corporation |
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25 / 109 page  25 3355C–USB–4/05 AT43USB325 4.7 External Reset An external reset is generated by a low-level on the RESET pin. Reset pulses longer than 200 ns will generate a reset. Shorter pulses are not guaranteed to generate a reset. When the applied signal reaches the Reset Threshold Voltage - V RST on its positive edge, the delay timer starts the MCU after the Time-out period t TOUT has expired. Figure 4-4. External Reset During Operation 4.8 Watchdog Timer Reset When the watchdog times out, it will generate a short reset pulse of 1 XTAL cycle duration. On the falling edge of this pulse, the delay timer starts counting the Time-out period t TOUT. Figure 4-5. Watchdog Reset During Operation tTOUT VRST VCC RESET TIME-OUT INTERNAL RESET tTOUT VCC RESET WDT TIME-OUT RESET TIME-OUT 1 XTAL Cycle INTERNAL RESET |
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