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AT89LP213 Datasheet(PDF) 53 Page - ATMEL Corporation |
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AT89LP213 Datasheet(HTML) 53 Page - ATMEL Corporation |
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53 / 90 page  53 3538A–MICRO–7/06 AT89LP213/214 [Preliminary] Figure 18-2. SPI Shift Register Diagram Figure 18-3. SPI Block Diagram 2:1 MUX 2:1 MUX Serial Master Serial Slave LATCH DQ CLK LATCH DQ CLK LATCH DQ CLK LATCH DQ CLK Parallel Slave (Read Buffer) Parallel Master (Write Buffer) Serial Out Receive Byte Serial In Transmit Byte 8 8 8 8 7 8 Oscillator 8-bit Shift Register Read Data Buffer SPI Control SPI Status Register SPI Interrupt Request Internal Data Bus Select SPI Clock (Mater) Divider ÷4÷8÷32÷64 SPI Control Register 8 8 8 MSTR Clock Logic Clock MSB S M LSB S M M S MISO P1.6 MOSI P1.5 SCK 1.7 SS P1.4 SPE Write Data Buffer |
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