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AT26F004 Datasheet(PDF) 14 Page - ATMEL Corporation |
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AT26F004 Datasheet(HTML) 14 Page - ATMEL Corporation |
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14 / 38 page ![]() 14 3588C–DFLASH–04/06 AT26F004 9.2 Write Disable The Write Disable command is used to reset the Write Enable Latch (WEL) bit in the Status Reg- ister to the logical “0” state. With the WEL bit reset, all program, erase, Protect Sector, Unprotect Sector, and Write Status Register commands will not be executed. The Write Disable command is also used to exit the Sequential Program mode. Other conditions can also cause the WEL bit to be reset; for more details, refer to the “WEL Bit” on page 20. To issue the Write Disable command, the CS pin must first be asserted and the opcode of 04h must be clocked into the device. No address bytes need to be clocked into the device, and any data clocked in after the opcode will be ignored. When the CS pin is deasserted, the WEL bit in the Status Register will be reset to a logical “0”. The complete opcode must be clocked into the device before the CS pin is deasserted; otherwise, the device will abort the operation and the state of the WEL bit will not change. Figure 9-2. Write Disable SCK CS SI SO MSB 23 1 0 00000100 67 5 4 OPCODE HIGH-IMPEDANCE |
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