AT83C24B datasheet(41/42 Pages) ATMEL

41 / 42 page

4234F–SCR–10/05

AT83C24

Datasheet

Change Log

Changes from

4234A-05/03 to

4234B-02/04

Addition of CRST, CIO, CCLK controllers descriptions, page 10.

Update of Hardware\Software activation description, page 14.

Suppression of low voltage regulator mode for power down modes, page 18.

Modification of clock values in CONFIG2 regsiter, page 22.

Addition of a point on QFN pinout view, page2.

Update of electrical characteristics, page 28.

Changes from

4234B-02/04 to

4234C - 04/04

Addition of references in ordering information

Update of EVCC description

Update of CARDDET bit and INSERT bit description

Changes from

4234C-04/04 to

4234D - 07/04

Update for Rev 4 silicon version (index 4 on component).

Software workaround for A2 or A2/2 selection in CKS register.

Max speed on IO/CIO transfer

New conditions for hardware activation (see IT_SEL).

SO28 drawing package (error with SO32).

Adjusted electrical parameters for NDS compliance, pages 28, 29, 30.

Changes from

4234D-04/04 to

4234E - 09/04

QFN28 new package drawing.

Clock input parameters for AT83C24 and AT83C24NDS.

Changes from

4234E - 09/04 to

4234F - 10/05

Updated green product ordering information.

AT83C24B Datasheet(PDF) 41 Page - ATMEL Corporation