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HA-2425 Datasheet(PDF) 6 Page - Intersil Corporation |
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HA-2425 Datasheet(HTML) 6 Page - Intersil Corporation |
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6 / 12 page ![]() 6 FN2856.6 November 19, 2004 Application Information Offset Adjustment The offset voltage of the HA-2420 and HA-2425 may be adjusted using a 100k Ω trim pot, as shown in Figure 8. The recommended adjustment procedure is: Apply 0V to the sample-and-hold input, and a square wave to the S/H control. Adjust the trim pot for 0V output in the hold mode. Gain Adjustment The linear variation in pedestal voltage with sample-and-hold input voltage causes a -0.06% gain error (CH = 1000pF). In some applications (D/A deglitcher, A/D converter) the gain error can be adjusted elsewhere in the system, while in other applications it must be adjusted at the sample-and-hold. The two circuits shown below demonstrate how to adjust gain error at the sample-and-hold. The recommended procedure for adjusting gain error is: 1. Perform offset adjustment. 2. Apply the nominal input voltage that should produce a +10V output. 3. Adjust the trim pot for +10V output in the hold mode. 4. Apply the nominal input voltage that should produce a -10V output. 5. Measure the output hold voltage (V-10NOMINAL). Adjust the trim pot for an output hold voltage of Figure 8 shows a typical unity gain circuit, with Offset Zeroing. All of the other normal op amp feedback configurations may be used with the HA-2420, HA-2425. The input amplifier may be used as a gated amplifier by utilizing Pin 11 as the output. This amplifier has excellent drive capabilities along with exceptionally low switch leakage. The method used to reduce leakage paths on the PC board and the device package is shown in Figure 9. This guard ring is recommended to minimize the drift during hold mode. The hold capacitor should have extremely high insulation resistance and low dielectric absorption. Polystyrene (below 85oC), Teflon, or Parlene types are recommended. For more applications, consult Intersil Application Note AN517, or the factory applications group. 0 +10 5 -5 -10 -15 -20 -25 -30 -35 -10 -5 +5 +10 DC INPUT VOLTAGE (V) HOLD STEP VOLTAGE (mV) CH = 100pF CH = 1000pF CH = 10,000pF CH = 0.1µF FIGURE 5. HOLD STEP vs INPUT VOLTAGE V 10 – NOMINAL () -10V () + 2 ----------------------------------------------------------------- -IN +IN OUT S/H CONTROL OUTPUT RI RF 0.002RF INPUT S/H CONTROL INPUT NOTE: GAIN RF – RI ----------- ∼ FIGURE 6. INVERTING CONFIGURATION +IN -IN OUT S/H CONTROL OUTPUT INPUT S/H CONTROL INPUT NOTE: GAIN ~ 1 RF RI -------- + RF RI 0.002RI FIGURE 7. NON-INVERTING CONFIGURATION IN V- 100k Ω OFFSET TRIM ( ±25mV RANGE) OUT V+ CONTROL CH - + - + FIGURE 8. BASIC SAMPLE-AND-HOLD (TOP VIEW) HA-2420, HA-2425 |
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