P80CL31 datasheet(20/68 Pages) PHILIPS

20 / 68 page

1997 Apr 15

Philips Semiconductors

Product speciﬁcation

Low voltage 8-bit microcontrollers with

UART

P80CL31; P80CL51

13 STANDARD SERIAL INTERFACE SIO0: UART

This serial port is full duplex which means that it can

transmit and receive simultaneously. It is also

receive-buffered and can commence reception of a

second byte before a previously received byte has been

read from the register. (However, if the first byte has not

been read by the time the reception of the second byte is

complete, one of the bytes will be lost). The serial port

receive and transmit registers are both accessed via the

Special Function Register S0BUF. Writing to S0BUF loads

the transmit register and reading S0BUF accesses a

physically separate receive register.

The serial port can operate in 4 modes:

Mode 0 Serial data enters and exits through RXD. TXD

outputs the shift clock. Eight bits are

transmitted/received (LSB first). The baud rate is

fixed at 1

⁄12 × fosc.

Mode 1 10 bits are transmitted (through TXD) or received

(through RXD): a start bit (logic 0), 8 data bits

(LSB first), and a stop bit (logic 1). On receive,

the stop bit goes into RB8 in Special Function

Mode 2 11 bits are transmitted (through TXD) or received

(through RXD): start bit (logic 0), 8 data bits (LSB

first), a programmable 9th data bit, and a stop bit

(logic 1). On transmit, the 9th data bit (TB8 in

S0CON) can be assigned the value of a logic 0 or

logic 1. Or, for example, the parity bit (P, in the

PSW) could be moved into TB8. On receive, the

9th data bit goes into RB8 in S0CON, while the

stop bit is ignored. The baud rate is

programmable to either 1

⁄32 or 1⁄64 × fosc.

Mode 3 11 bits are transmitted (through TXD) or received

(through RXD): a start bit (logic 0), 8 data bits

(LSB first), a programmable 9th data bit and a

stop bit (logic 1). In fact, Mode 3 is the same as

Mode 2 in all respects except baud rate.

The baud rate in Mode 3 is variable.

In all four modes, transmission is initiated by any

instruction that uses S0BUF as a destination register.

Reception is initiated in Mode 0 by the condition RI = 0 and

REN = 1. Reception is initiated in the other modes by the

incoming start bit if REN = 1.

13.1

Multiprocessor communications

Modes 2 and 3 have a special provision for multiprocessor

communications. In these modes, 9 data bits are received.

The 9th bit goes into RB8. The following bit is the stop bit.

The port can be programmed such that when the stop bit

is received, the serial port interrupt will be activated, but

only if RB8 = 1. This feature is enabled by setting bit SM2

in S0CON. One use of this feature, in multiprocessor

systems, is as follows.

When the master processor wants to transmit a block of

data to one of several slaves, it first sends out an address

byte which identifies the target slave. An address byte

differs from a data byte in that the 9th bit is HIGH in an

address byte and LOW in a data byte. With SM2 = 1,

no slave will be interrupted by a data byte. An address

byte, however, will interrupt all slaves, so that each slave

can examine the received byte and see if it is being

addressed. The addressed slave will clear its SM2 bit and

prepare to receive the data bytes that will be sent. The

slaves that were not being addressed leave their SM2 bits

set and go on about their business, ignoring the coming

data bytes.

SM2 has no effect in Mode 0, and in Mode 1 can be used

to check the validity of the stop bit. In a Mode 1 reception,

if SM2 = 1, the receive interrupt will not be activated unless

a valid stop bit is received.

13.2

Serial Port Control and Status Register

(S0CON)

The Serial Port Control and Status Register is the Special

Function Register S0CON. The register contains not only

the mode selection bits, but also the 9th data bit for transmit

and receive (TB8 and RB8), and the serial port interrupt

bits (TI and RI).

P80CL31 Datasheet(PDF) 20 Page - NXP Semiconductors

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