PCD5002 datasheet(30/48 Pages) PHILIPS

30 / 48 page

1997 Jun 24

Philips Semiconductors

Product speciﬁcation

Advanced POCSAG and APOC-1 Paging

Decoder

PCD5002

8.57

Synthesizer programming data

Data for programming a PLL synthesizer via pins ZSD,

ZSC and ZLE can be stored in row 1 of the EEPROM.

Six bytes are available starting with address 08H.

Data is transferred in two serial blocks of 24 bits each,

starting with bit 0 (MSB) of block 1. Any unused bits must

be programmed at the beginning of a block.

Table 28 Synthesizer programming data (EEPROM

address 08H to 0DH)

8.58

Identiﬁer storage allocation

Up to 6 different identifiers can be stored in EEPROM for

matching with incoming data. The PCD5002 can

distinguish two types of identifiers:

• User addresses (RIC)

• User Programmable Sync Words (UPSW)

• Batch zero identifiers

• Continuous data decoding (CDD) sync words.

ADDRESS

(HEX)

BIT

(MSB: D7)

DESCRIPTION

D7 to D0

bits 0 to 7 of data

block 1 (bit 0 is MSB)

D7 to D0

bits 8 to 15

D7 to D0

bits 16 to 23

D7 to D0

bits 0 to 7 of data

block 2 (bit 0 is MSB)

D7 to D0

bits 8 to 15

D7 to D0

bits 16 to 23

Identifiers are stored in EEPROM rows 2, 3 and 4. Each

identifier location consists of 3 bytes in the same column.

The identifier number is equal to the column number + 1.

Each identifier can be individually enabled. The standard

POCSAG sync word is always enabled and has identifier

number 7.

The identifier type is determined by bits D2 and D0 of

identifier byte 3, as shown in Table 31.

Identifiers 1 and 2 always represent RICs or batch zero

identifiers. The last 4 identifiers (numbers 3 to 6) can

represent any identifier type.

A UPSW represents an unused address and must differ by

more than 6 bits from preamble to guarantee detection.

A batch zero identifier marks the start of a new cycle in the

APOC-1 protocol. It is only recognized when APOC-1

decoding has been enabled (SPF byte 00, bit D0).

Reception of a CDD sync word initiates continuous data

decoding. CDD sync words are only recognized when

continuous data decoding has been enabled (SPF

byte 00, bit 6).

Table 29 shows the memory locations of the 6 identifiers.

The bit allocation per identifier is given in Table 30.

Table 29 Identiﬁer storage allocation (EEPROM address 10H to 25H)

ADDRESS (HEX)

BYTE

DESCRIPTION

10 to 15

identiﬁer number 1 to 6

18 to 1D

identiﬁer number 1 to 6

20 to 25

identiﬁer number 1 to 6

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