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AWR1642 Datasheet(PDF) 32 Page - Texas Instruments |
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AWR1642 Datasheet(HTML) 32 Page - Texas Instruments |
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32 / 75 page ![]() SYNC_IN (Hardware Trigger) Radar Frames Tlag Frame-1 Frame-2 Tactive_frame Tpulse Software API Trigger Figure 7-9. Sync In Hardware Trigger Table 7-16. Frame Trigger Timing PARAMETER DESCRIPTION MIN MAX UNIT Tactive_frame Active frame duration User defined ns Tpulse 25 < Tactive_frame or 4000 7.13.3 Input Clocks and Oscillators 7.13.3.1 Clock Specifications The AWRL6432 requires external clock source (that is, a 40MHz crystal or external oscillator to CLKP) for initial boot and as a reference for an internal APLL hosted in the device. An external crystal connected to the device pins Figure 7-10 shows the crystal implementation. 40 MHz CLKP CLKM Cf1 Cf2 Cp Figure 7-10. Crystal Implementation Note The load capacitors, Cf1 and Cf2 in Figure 7-10, should be chosen such that Equation 1 is satisfied. CL in the equation is the load specified by the crystal manufacturer. All discrete components used to implement the oscillator circuit should be placed as close as possible to the associated oscillator CLKP and CLKM pins. f 2 L f1 P f1 f 2 C C C C C C = ´ + + (1) Table 7-17 lists the electrical characteristics of the clock crystal. AWRL6432 SWRS295A – DECEMBER 2022 – REVISED MARCH 2024 www.ti.com 32 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: AWRL6432 |
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