SFH5721 datasheet(27/54 Pages) OSRAM

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SFH 5721

DATASHEET

27 | Version 1.1 | 2022-02-28

Interrupt Configuration Register (ICONF)

0x03

Bit

NAME

R/W

Default

Description

7:6

R/W

Not used

ICC

R/W

Interrupt Clear Configuration

IOA

R/W

Interrupt Or-And Configuration

3:0

IPERS[3:0]

R/W

0000

Persistence Configuration

The ICONF register is used to configure the interrupt function of the IC. The register controls the

filtering interrupt capability of the device by IPERS[3:0] bits. Configurable filtering is provided to allow

interrupts to be generated after each ADC integration cycle or if the ADC integration has produced

a result that is outside of the values specified by high or low threshold register for some specified

amount of time. When multiple readout channels are enabled, IOA (Interrupt-Or-And) bit determine

if interrupt is generated when a single channel generates the interrupt (Or) or if all enabled channels

whose interrupt is enabled generate the interrupt (And). Clearing of the interrupt is configured by

ICC bit. If one of the Single Shot Modes is activated, the interrupt is activated for 24μs only and then

released again.

SFH5721 Datasheet(PDF) 27 Page - OSRAM GmbH