TMD2755 datasheet(31/54 Pages) OSRAM

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[v3-00] 2023-Jan-02

TMD2755 − Register Description

REVID2 Register (Address 0xA6)

Figure 44:

REVID2 Register

SOFTRST Register (Address 0xA8)

Figure 45:

SOFTRST Register

Addr: 0xA6

REVID2

Bit

Bit Name

Default

Access

Bit Description

7:4

Reserved

0000

Reserved.

3:0

VER_ID

0000 or 1100

Device version number.

Addr: 0xA8

SOFTRST

Bit

Bit Name

Default

Access

Bit Description

7:2

Reserved

Reserved. Must be set to default value.

POR

Writing a 1 to this bit will cause a power on

reset. This will immediately terminate all

device operation and put the device into the

sleep state.

0SOFTRST

Writing a 1 to this bit will cause all registers to be

reset to their default state. This will immediately

terminate all device operation and put the

device into the sleep state.

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