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TMD2755 Datasheet(PDF) 32 Page - OSRAM GmbH |
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TMD2755 Datasheet(HTML) 32 Page - OSRAM GmbH |
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32 / 54 page ![]() Datasheet, Public Page 31 [v3-00] 2023-Jan-02 Document Feedback TMD2755 − Register Description PWTIME Register (Address 0xA9) Figure 46: PWTIME Register The wait timer is implemented using a down counter. Wait time = Increment x 2.78ms. If PWLONG is enabled then Wait time = Increment x 2.78ms x 12. CFG8 Register (Address 0xAA) Figure 47: CFG8 Register Addr: 0xA9 PWTIME Bit Bit Name Default Access Bit Description 7:0 PWTIME 0x00 RW Value that specifies the wait time in 2.78ms increments. Value Increments Wait Time 0x00 1 2.78ms (33.4ms) 0x01 2 5.56ms (66.7ms) 0x11 18 50.0ms (600ms) 0x23 36 100ms (1.20s) 0x3F 64 178ms (2.14s) 0xFF 256 712ms (8.54s) Addr: 0xAA CFG8 Bit Bit Name Default Access Bit Description 7:0 Reserved 0x2A RW Reserved. Must be set to 0x29. |
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