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ADPA1116 Datasheet(PDF) 1 Page - Analog Devices |
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ADPA1116 Datasheet(HTML) 1 Page - Analog Devices |
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1 / 17 page ![]() Data Sheet ADPA1116 0.3 GHz to 6 GHz, 39.5 dBm, GaN Power Amplifier Rev. 0 DOCUMENT FEEDBACK TECHNICAL SUPPORT Information furnished by Analog Devices is believed to be accurate and reliable "as is". However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. FEATURES ► Internally matched, 0.3 GHz to 6 GHz, 39.5 dBm, GaN power amplifier ► RF input and RF output AC-coupled ► Integrated drain bias inductors ► Output power: 39.5 dBm typical from 0.5 GHz to 5 GHz (PIN = 16.0 dBm) ► Power gain: 23.5 dB typical from 0.5 GHz to 5 GHz (PIN = 16.0 dBm) ► PAE: 40% typical from 0.5 GHz to 5 GHz (PIN = 16.0 dBm) ► Small signal gain: 33.5 dB typical from 0.5 GHz to 5 GHz ► Supply voltage: 28 V ► Quiescent current: 300 mA APPLICATIONS ► Electronic warfare ► Communications ► Radar FUNCTIONAL BLOCK DIAGRAM Figure 1. Functional Block Diagram GENERAL DESCRIPTION The ADPA1116 is a 0.3 GHz to 6 GHz power amplifier with a saturated output power (POUT) of 39.5 dBm, power added efficiency (PAE) of 40%, and a power gain of 23.5 dB typical from 0.5 GHz to 5 GHz at an input power (PIN) of 16.0 dBm. The RF input and RF output are internally matched and AC-coupled. A drain bias voltage of 28 V is applied to the VDD1 and VDD2 pins, which have integrated bias inductors. The drain current is set by applying a negative voltage to the VGG1 pin. The ADPA1116 is fabricated on a gallium nitride (GaN) process, is housed in a 32-lead lead frame chip scale package, premolded cavity [LFCSP_CAV], and is specified for operation from −40°C to +85°C |
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