7.2.2 Detailed Design Procedure

7.2.2.1 Setting the Output Voltage

The output voltage is set by an external resistor divider (R1, R2 in Figure 7-1). When the output voltage is

regulated, the typical voltage at the FB pin is VREF. Thus the resistor divider is determined by Equation 2.

OUT

REF

V

R1

1

R2

V

§

·

u

¨

¸

©

¹

(2)

where

• VOUT is the regulated output voltage

• VREF is the internal reference voltage at the FB pin

For the best accuracy, keep R2 smaller than 300kΩ to ensure the current flowing through R2 is at least 100

times larger than the FB pin leakage current. Changing R2 towards a lower value increases the immunity against

noise injection. Changing the R2 towards a higher value reduces the quiescent current for achieving highest

efficiency at low load currents.

7.2.2.2 Output Capacitor Selection

The output capacitor is mainly selected to meet the requirements for output ripple and loop stability. The ripple

voltage is related to capacitor capacitance and its equivalent series resistance (ESR). Assuming a ceramic

capacitor with zero ESR, the minimum capacitance needed for a given ripple voltage can be calculated by

Equation 3.

OUT

MAX

OUT

SW

RIPPLE

I

D

C

f

V

u

u

(3)

where

• DMAX is the maximum switching duty cycle

• VRIPPLE is the peak-to-peak output ripple voltage

• IOUT is the maximum output current

• fSW is the switching frequency

The ESR impact on the output ripple must be considered if tantalum or aluminum electrolytic capacitors are

used. The output peak-to-peak ripple voltage caused by the ESR of the output capacitors can be calculated by

Equation 4.

RIPPLE(ESR)

L(P)

ESR

V

I

R

u

(4)

Take care when evaluating the derating of a ceramic capacitor under dc bias voltage, aging, and ac signal. For

example, the dc bias voltage can significantly reduce capacitance. A ceramic capacitor can lose more than 50%

of its capacitance at its rated voltage. Therefore, always leave margin on the voltage rating to ensure adequate

capacitance at the required output voltage. Increasing the output capacitor makes the output ripple voltage

smaller in PWM mode.

TI recommends using the X5R or X7R ceramic output capacitor in the range of 4μF to 1000μF effective

capacitance when output current is lower than 1A, and 10μF to 1000μF effective capacitance when output

current is higher than 1A. The output capacitor affects the small signal control loop stability of the boost

regulator. If the output capacitor is below the range, the boost regulator can potentially become unstable.

Increasing the output capacitor makes the output ripple voltage smaller in PWM mode.

For large output capacitance more than 40μF application, TI recommends a feedforward capacitor to set the

zero frequency (fFFZ) to 1kHz.

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TPSM81033

SLVSHL0B – JUNE 2024 – REVISED JULY 2024

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