MCP60713 datasheet(22/41 Pages) MICROCHIP

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MCP60711/1U/3

DS20006870A-page 22

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circuit's noise gain. For noninverting gains, GN and the

Signal Gain are equal. For inverting gains, GN is

1 + |Signal Gain| (e.g., -1 V/V gives GN =+2V/V).

After selecting RISO for your circuit, double-check the

resulting frequency response peaking and step

response overshoot. Modify RISO's value until the

response is reasonable. Bench evaluation of RISO's

effect on a specific design is important.

4.2.5

ESTIMATING THE BANDWIDTH

The three most common op amp circuits are repre-

sented by Figure 4-6: noninverting gain (RPF = open

and VIM grounded), inverting gain (RPF = open and VIP

grounded) and differential (difference) gain.

FIGURE 4-6:

Common Op Amp

Configurations.

The Noise Gain and Small Signal Bandwidth are:

EQUATION 4-9:

The Full Power Bandwidth (FPBW) is the frequency

where a large output sine wave’s maximum slope

equals the Slew Rate (SR):

EQUATION 4-10:

For accurate AC gains, set BW higher than the input

signal’s bandwidth (e.g., a 10 to 1 ratio). For low

harmonic distortion, set FPBW higher than BW (e.g., a

3 to 1 ratio).

4.2.6

GAIN PEAKING

Figure 4-7 shows an op amp circuit that represents

noninverting amplifiers (VM is a DC voltage and VP is

the input) or inverting amplifiers (VP is a DC voltage

and VM is the input). The capacitances CN and CG

represent the total capacitance at the input pins; they

include the op amp’s Common mode input capacitance

(CCM), board parasitic capacitance and any capacitor

placed in parallel.

FIGURE 4-7:

Amplifier with Parasitic

Capacitance.

CG acts in parallel with RG (except for a gain of +1 V/V),

which causes an increase in gain at high frequencies.

CG also reduces the phase margin of the feedback

loop, which becomes less stable. This effect can be

reduced by either reducing CG and/or RF||RG so that:

EQUATION 4-11:

CN and RN form a low-pass filter that affects the signal

at VIP. This filter has a single real pole at 1/(2πRNCN).

Usually, this pole should be faster than the BW:

EQUATION 4-12:

It is also possible to add a capacitor (CF) in parallel with

RF to compensate for the destabilizing effect of CG,

making it possible to use larger values of RF. This will

also reduce the bandwidth at higher gain. The

conditions for stability are shown in Figure 4-13.

It pays to simulate the circuit after making these

changes. Be sure to include all of the significant

capacitances and inductances, including parasitic

ones.

EQUATION 4-13:

4.2.7

POWER UP/DOWN

The “Power Up/Down” section of Table 1-2 specifies

how IQ and VOUT behave when power pin (VDD) turns

the part on and off, using the internal POR circuit.

MCP6071X

VIP

VOUT

RPF

VIM

GN =1+RF/RG

BW ≈ GBWP/GN,GN >2

VOPP = Peak-to-Peak Output Voltage, (VP-P)

FPBW ≈ |SR|/(π VOPP), (Hz)

MCP6071X

VOUT

2BW ≤ 1/(2π(RF||RG)CG)

2BW ≤ 1/(2πRNCN)

Given:

We need:

GN1 =1 + RF/RG

GN2 =1 + CG/CF

fF =1 / (2πRFCF), response pole

fZ =fF (GN1/GN2), response zero

fF ≤ GBWP/(2GN2), GN1 <GN2

fF ≤ GBWP/(4GN1), GN1 >GN2

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