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SC26C198 Datasheet(PDF) 1 Page - NXP Semiconductors |
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SC26C198 Datasheet(HTML) 1 Page - NXP Semiconductors |
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1 / 49 page  Philips Semiconductors Product specification SC26C198 SC68C198 SC26L198 SC68L198 Octal UART with TTL compatibility at 3.3V and 5V supply voltages 336 1995 May 1 853-1756 15179 Table of Contents Description 336 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Uses 337 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Features 337 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Configurations 338 . . . . . . . . . . . . . . . . . . . . . . . . . Pinout 338 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Description 339 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings 339 . . . . . . . . . . . . . . . . . Block Diagram 340 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description 340 . . . . . . . . . . . . . . . . . . . . . Conceptual Overview 340 . . . . . . . . . . . . . . . . . . . . . . . Host Interface 340 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Asynchronous bus cycle 340 . . . . . . . . . . . . . . . . . . . . . . . . . . . Synchronous bus cycle 340 . . . . . . . . . . . . . . . . . . . . . . . . . . . . Timing Circuits 341 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Crystal Oscillator 341 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Sclk – System Clock 341 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Baud Rate Generator BRG 341 . . . . . . . . . . . . . . . . . . . . . . . . BRG Counters (Used for random baud rate generation) 341 Channel Blocks 341 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Character Recognition 341 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Interrupt Control 342 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Global Registers 342 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I/O Ports 342 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Detailed Descriptions 342 . . . . . . . . . . . . . . . . . . . . . . . Receiver and Transmitter 342 . . . . . . . . . . . . . . . . . . . Transmitter 342 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transmitter Status Bits 342 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transmission of ”break” 343 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1x and 16x modes, Transmitter 343 . . . . . . . . . . . . . . . . . . . . . Transmitter FIFO 343 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receiver 343 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1x and 16x mode, Receiver 343 . . . . . . . . . . . . . . . . . . . . . . . . . Receiver Status Bits 343 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Receiver FIFO 344 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . RxFIFO Status: Status reporting modes 344 . . . . . . . . . . . . . . I/O ports 344 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . General Purpose Pins 345 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Global Registers 345 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Character Recognition 345 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Xon Xoff Characters 345 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Multi-drop or Wake up or 9 bit mode 345 . . . . . . . . . . . . . . . . . Character Stripping 345 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Interrupt Arbitration and IRQN generation 345 . . . . . . . . . . . . . . . . IACKN Cycle, Update CIR 346 . . . . . . . . . . . . . . . . . . . . . . . . . . Polling 346 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Enabling and Activating Interrupt sources 346 . . . . . . . . . . . . . Setting Interrupt Priorities 346 . . . . . . . . . . . . . . . . . . . . . . . . . . Modes of Operation 347 . . . . . . . . . . . . . . . . . . . . . . . . Major Modes 347 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Minor Modes 348 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Watch-dog Timer Time–out Mode 348 . . . . . . . . . . . . . . . . . . . Wake Up Mode 348 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Xon/Xoff Operation 349 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . REGISTER DEfiniTIONS 351 . . . . . . . . . . . . . . . . . . . . MR – Mode Registers 351 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UCIR – Update CIR 360 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . General Purpose Output Pin Control 361 . . . . . . . . Register Maps 363 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Register Map Summary 363 . . . . . . . . . . . . . . . . . . . . . Register Map Detail 364 . . . . . . . . . . . . . . . . . . . . . . . . Reset Conditions 372 . . . . . . . . . . . . . . . . . . . . . . . . . . . Device Configuration after Hardware Reset or CRa cmd=x1F 372 Cleared registers: 372 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Clears Modes for: 372 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Disables: 372 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Halts: 372 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Limitations: 373 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DC Electrical Specifications (26C198 and 68C198) 373 . . . . . . . . . . . . . . . . . . . . . . . DC Electrical Specifications (26L198 and 68L198) 376 . . . . . . . . . . . . . . . . . . . . . . . AC Electrical Characteristics5 (26L198 and 68L198) 377 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . INDEX 383 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DESCRIPTION The Philips 26C198 Octal UART is a single chip CMOS–LSI communications device that provides 8 full-duplex asynchronous channels with significantly deeper 16 byte FIFOs, Automatic in–band flow control using Xon/Xoff characters defined by the user and address recognition in the wake up mode. Synchronous bus interface is used for all communication between host and OCTART. It is fabricated using Philips 1.0 micron CMOS technology that combines the benefits of low cost, high density and low power consumption. The operating speed of each receiver and transmitter can be selected independently from one of 22 fixed baud rates, a 16X clock derived from one of two programmable baud rate counters or one of three external 16X clocks (1 available at 1x clock rate). The baud rate generator and counter can operate directly from a crystal or from seven other external or internal clock inputs. The ability to independently program the operating speed of the receiver and transmitter makes the Octal UART particularly attractive for dual speed full duplex channel applications such as clustered terminal systems. The receivers and transmitters are buffered with FIFOs of 16 characters to minimize the potential for receiver overrun and to reduce interrupt overhead. In addition, a handshaking capability and in–band flow control are provided to disable a remote UART transmitter when the receiver buffer is full or nearly so. To minimize interrupt overhead an interrupt arbitration system is included which reports the context of the interrupting UART via direct access or through the modification of the interrupt vector. The context of the interrupt is reported as channel number, type of device interrupting ( receiver COS etc.) and, for transmitters or receivers, the fill level of the FIFO. The Octal UART provides a power down mode in which the oscillator is stopped but the register contents are maintained. This results in reduced power consumption of several orders of magnitudes. The Octal UART is fully TTL compatible when operating from a single +5V power supply. Operation at 3.3 volts is maintained with CMOS interface levels. The device also offered in a version which maintains TTL input and output levels while operating with a 3.3 volt power supply. |
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