DS28EC20

Analog Devices, Inc.

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MEMORY FUNCTION COMMANDS

The Memory Function Flowchart (Figure 7) describes the protocols necessary for accessing the memory of the

DS28EC20. The target address registers TA1 and TA2 are used for both read and write. To prevent accidental

changes to the data memory or control registers the device employs a BS-flag indicating a “bad sequence”. The

communication between controller and DS28EC20 takes place either at standard speed (default, OD = 0) or at

overdrive speed (OD = 1). If not explicitly set into the Overdrive mode, the DS28EC20 assumes standard speed.

For operation at overdrive speed, the DS28EC20 requires VPUP to be between 4V and 5.25V.

WRITE SCRATCHPAD COMMAND [0Fh]

The Write Scratchpad command applies to the data memory and the writable addresses in the register page. After

issuing the Write Scratchpad command, the controller must first provide the 2-byte target address, followed by the

data to be written to the scratchpad. The data is written to the scratchpad starting at the byte offset of T[4:0]. The

E/S bits E[4:0] are loaded with the starting byte offset, and increment with each subsequent byte. Effectively, E[4:0]

is the byte offset of the last full byte written to the scratchpad. Only full bytes are accepted. If the last byte is

incomplete its content is ignored and the partial byte flag PF is set. The PF flag is also set if the controller ends the

command before a complete target address is transmitted. The PF and BS flags are both cleared when a complete

target address is received.

When executing the Write Scratchpad command, the CRC generator inside the DS28EC20 (Figure 13) calculates a

16-bit CRC of the entire data stream, starting at the command code and ending at the last data byte as sent by the

controller. This CRC is generated using the CRC16 polynomial (X16 + X15 + X2 + 1) by first clearing the CRC

generator and then shifting in the command code (0Fh) of the Write Scratchpad command, the target addresses

TA1 and TA2 as supplied by the controller, and all the data bytes. The controller can end the Write Scratchpad

command at any time. However, if the end of the scratchpad is reached (E[4:0] = 11111b), the controller can send

16 read-time slots to receive the CRC generated by the DS28EC20.

If a Write Scratchpad is attempted to a write-protected location, the scratchpad is loaded with the data already in

memory, rather than the data transmitted. Similarly, if the target address page is in EPROM mode, the scratchpad

is loaded with the bitwise logical AND of the transmitted data and the data already in memory.

The DS28EC20’s memory address range is 0000h to 0A3Fh. If the bus controller sends a target address higher

than this, the DS28EC20’s internal circuitry sets the four most significant address bits to zero as they are shifted

into the internal address register. The Read Scratchpad command reveals the modified target address. The

controller identifies such address modifications by comparing the target address read back to the target address

transmitted. If the controller does not read the scratchpad, a subsequent Copy Scratchpad command does not

work since the most significant bits of the target address the controller sends do not match the value the

DS28EC20 expects.

READ SCRATCHPAD COMMAND [Aah]

The Read Scratchpad command allows verifying the target address and the integrity of the scratchpad data. After

issuing the command code, the controller begins reading. The first two bytes are the target address. The next byte

is the Ending Offset/Data Status byte (E/S) followed by the scratchpad data beginning at the byte offset (T[4:0]).

The scratchpad data can be different from what the controller originally sent. This is of particular importance if the

target address is within the register page or a page in either Write Protection or EPROM modes. See the Write

Scratchpad Command section for details. The controller should read through the end of the scratchpad, after which

it receives an inverted CRC16, based on data as it was sent by the DS28EC20. If the controller continues reading

after the CRC, all data are logic 1s.