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DS28EC20 Datasheet(PDF) 19 Page - Analog Devices

Part # DS28EC20
Description  20Kb 1-Wire EEPROM
PDF  28 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

DS28EC20 Datasheet(HTML) 19 Page - Analog Devices

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DS28EC20
Analog Devices, Inc.
19 of 28
MATCH ROM [55h]
The Match ROM command, followed by a 64-bit ROM sequence, allows the bus controller to address a specific
DS28EC20 on a multidrop bus. Only the DS28EC20 that exactly matches the 64-bit ROM sequence responds to
the following memory function command. All other peripherals wait for a reset pulse. This command can be used
with a single or multiple devices on the bus.
SEARCH ROM [F0h]
When a system is initially brought up, the bus controller might not know the number of devices on the 1-Wire bus or
their registration numbers. By taking advantage of the bus’s wired-AND property, the controller can use a process
of elimination to identify the registration numbers of all peripheral devices. For each bit of the registration number,
starting with the least significant bit, the bus controller issues a triplet of time slots. On the first slot, each peripheral
device participating in the search outputs the true value of its registration number bit. On the second slot, each
peripheral device participating in the search outputs the complemented value of its registration number bit. On the
third slot, the controller writes the true value of the bit to be selected. All peripheral devices that do not match the
bit written by the controller stop participating in the search. If both of the read bits are zero, the controller knows
that peripheral devices exist with both states of the bit. By choosing which state to write, the bus controller
branches in the ROM code tree. After one complete pass, the bus controller knows the registration number of a
single device. Additional passes identify the registration numbers of the remaining devices. Refer to the 1-Wire
Search Algorithm application note for a detailed discussion, including an example.
SKIP ROM [CCh]
This command can save time in a single-drop bus system by allowing the bus controller to access the memory
functions without providing the 64-bit ROM code. If more than one peripheral is present on the bus and, for
example, a Read command is issued following the Skip ROM command, data collision occurs on the bus as
multiple peripherals transmit simultaneously (open-drain pulldowns produce a wired-AND result).
RESUME [A5h]
To maximize the data throughput in a multidrop environment, the Resume function is available. This function
checks the status of the RC bit and, if it is set, directly transfers control to the memory functions, similar to a Skip
ROM command. The only way to set the RC bit is through successfully executing the Match ROM, Search ROM, or
Overdrive Match ROM command. Once the RC bit is set, the device can repeatedly be accessed through the
Resume command function. Accessing another device on the bus clears the RC bit, preventing two or more
devices from simultaneously responding to the Resume command function.
OVERDRIVE SKIP ROM [3Ch]*
On a single-drop bus this command can save time by allowing the bus controller to access the memory functions
without providing the 64-bit ROM code. Unlike the normal Skip ROM command, the Overdrive Skip ROM sets the
DS28EC20 in the Overdrive mode (OD = 1). All communication following this command must occur at overdrive
speed until a reset pulse of minimum 480µs duration resets all devices on the bus to standard speed (OD = 0).
When issued on a multidrop bus, this command sets all overdrive-supporting devices into Overdrive mode. To
subsequently address a specific overdrive-supporting device, a reset pulse at overdrive speed must be issued
followed by a Match ROM or Search ROM command sequence. This speeds up the time for the search process. If
more than one peripheral supporting overdrive is present on the bus and the Overdrive Skip ROM command is
followed by a Read command, data collision occurs on the bus as multiple peripherals transmit simultaneously
(open-drain pulldowns produce a wired-AND result).
OVERDRIVE MATCH ROM [69h]*
The Overdrive Match ROM command followed by a 64-bit ROM sequence transmitted at overdrive speed allows
the bus controller to address a specific DS28EC20 on a multidrop bus and to simultaneously set it in Overdrive
mode. Only the DS28EC20 that exactly matches the 64-bit ROM sequence responds to the subsequent memory
function command. Peripherals already in Overdrive mode from a previous Overdrive Skip or successful Overdrive
Match command remain in Overdrive mode. All overdrive-capable peripherals return to standard speed at the next
Reset Pulse of minimum 480µs duration. The Overdrive Match ROM command can be used with a single or
multiple devices on the bus.
* For operation at overdrive speed, the DS28EC20 requires VPUP to be between 4V and 5.25V.



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