LTC1159CS datasheet(14/20 Pages) LINER

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LTC1159

LTC1159-3.3/LTC1159-5

certain types of inductors in high current (IOUT > 5A)

applications when they are lightly loaded.

An external offset is put in series with the SENSE – pin to

subtract from the built-in 0.025V offset. An example of this

technique is shown in Figure 7. Two 100

Ω resistors are

inserted in series with the leads from the sense resistor.

With the addition of R3, a current is generated through R1

causing an offset of:

VOFFSET = VOUT

)

) R1

R1 + R3

If VOFFSET > 0.025V, the minimum threshold will be

cancelled and Burst Mode operation is prevented from

occurring. Since VOFFSET is constant, the maximum load

current is also decreased by the same offset. Thus, to get

back to the same IMAX, the value of the sense resistor must

be reduced:

RSENSE ≈

Ω

IMAX

To prevent noise spikes from erroneously tripping the

current comparator, a 1000pF capacitor is needed across

the SENSE– and SENSE+ pins.

Board Layout Checklist

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of the

LTC1159. These items are also illustrated graphically in

the layout diagram of Figure 8. Check the following in your

layout:

LTC1159

SENSE+

SENSE –

1000pF

100

Ω

100

Ω

RSENSE

COUT

LTC1159 • F07

Figure 7. Suppressing Burst Mode Operation

P-GATE

VIN

VCC

P-DRIVE

VCC

ITH

SENSE–

CAP

SHDN2

EXTVCC

N-GATE

PGND

SGND

SENSE+

COUT

P-CHANNEL

3300pF

RSENSE

N-CHANNEL

CIN

–

VOUT

VIN

OUTPUT DIVIDER

REQUIRED WITH

ADJUSTABLE

VERSION ONLY

BOLD LINES INDICATE HIGH CURRENT PATHS

LTC1159 • F08

1000pF

100pF

µF

0.15

µF

1N4148

SHUTDOWN

5V EXTVCC

CONNECTION

0.1

µF

VFB

(SHDN1)

Figure 8. LTC1159 Layout Diagram (N and S Packages)

APPLICATIO S I FOR ATIO

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