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AD5675R Datasheet(PDF) 26 Page - Analog Devices |
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AD5675R Datasheet(HTML) 26 Page - Analog Devices |
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26 / 32 page ![]() AD5674/AD5674R/AD5679/AD5679R Data Sheet Rev. B | Page 26 of 32 enabled for the duration of the read operation, after which the SDO output is disabled again. Command 1001 is reserved for the readback function. This command, in association with the address bits (A3 to A0), selects the DAC input register to read (see Table 10 and Table 11). During readback, only one input register can be selected. The remaining data bits in the write sequence are don’t care bits. During the next SPI write, the data appearing on the SDO output contains the data from the previously addressed register. For example, to read back the DAC register for Channel 0, implement the following sequence: 1. Write 0x900000 to the AD5674/AD5674R/AD5679/ AD5679R input register. This configures the device for read mode with the DAC register of Channel 0 selected. Note that all data bits, DB15 to DB0, are don’t care bits. 2. Follow Step 1 with a second write, a no operation (NOP) condition, 0x000000 or 0xF00000 when in daisy-chain mode. During this write, the data from the register is clocked out on the SDO line. DB23 to DB20 contain undefined data, and the last 20 bits contain the DB19 to DB0 DAC register contents. When SYNC is high, the SDO pin is driven by a weak latch that holds the last data bit. The SDO pin can be overdriven by the SDO pin of another device. Multiple devices can be read using the same SPI interface. POWER-DOWN OPERATION Command 0100 is designated for the power-down function (see Table 10). These power-down modes are software programmable by setting 16 bits, Bit DB15 to Bit DB0, in the input shift register. There are two bits associated with each DAC channel. Table 13 shows how the state of the two bits corresponds to the mode of operation of the device. Any or all DACs (DAC 0 to DAC 15) power down to the selected mode by setting the corresponding bits. See Table 14 and Table 15 for the contents of the input shift register during the power-down/power-up operation. Table 13. Modes of Operation Operating Mode PD1 PD0 Normal Operation 0 0 Power-Down Modes 1 kΩ to GND 0 1 When both Bit PD1 and Bit PD0 in the input shift register are set to 0, the device works normally with a typical power consumption of 2.3 mA at 5 V. However, for the 1 kΩ power-down mode, the supply current typically falls to 2 µA. In addition to this fall, the output stage switches internally from the amplifier output to a resistor network of a known value. Therefore, the DAC channel output impedance is defined when the channel is powered down by internally connecting the output to GND through a 1 kΩ resistor. Figure 62 shows the output stage. Figure 62. Output Stage During Power-Down The bias generator, output amplifier, resistor string, and other associated linear circuitry shut down when power-down mode is activated. However, the contents of the DAC register are unaffected when in power-down. The DAC register updates while the device is in power-down mode. The time required to exit power-down is typically 3 µs for VDD = 5 V. To reduce the current consumption further, power off the on-chip reference. See the Internal Reference Setup section. Table 14. 24-Bit Input Shift Register Contents of Power-Down/Power-Up Operation for Output Channels DAC 7 to DAC 0 [DB23:DB20] DB19 [DB18:DB16] DAC 7 DAC 6 DAC 5 DAC 4 DAC 3 DAC 2 DAC 1 DAC 0 [DB15:DB14] [DB13:DB12] [DB11:DB10] [DB9:DB8] [DB7:DB6] [DB5:DB4] [DB3:DB2] [DB1:DB0] 0100 0 XXX1 [PD1:PD0] [PD1:PD0] [PD1:PD0] [PD1:PD0] [PD1:PD0] [PD1:PD0] [PD1:PD0] [PD1:PD0] Table 15. 24-Bit Input Shift Register Contents of Power-Down/Power-Up Operation for Output Channels DAC 15 to DAC 8 [DB23:DB20] DB19 [DB18:DB16] DAC 15 DAC 14 DAC 13 DAC 12 DAC 11 DAC 10 DAC 9 DAC 8 [DB15:DB14] [DB13:DB12] [DB11:DB10] [DB9:DB8] [DB7:DB6] [DB5:DB4] [DB3:DB2] [DB1:DB0] 0100 1 XXX1 [PD1:PD0] [PD1:PD0] [PD1:PD0] [PD1:PD0] [PD1:PD0] [PD1:PD0] [PD1:PD0] [PD1:PD0] 1 X means don’t care. RESISTOR NETWORK VOUT DAC POWER-DOWN CIRCUITRY AMPLIFIER 1 X means don’t care. |
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