LTC2909

14

2909fa

APPLICATIO S I FOR ATIO

This imposes a practical limit of 1μF (9 second timeout) if

the length of timeout during power-up needs to be longer

than 200ms. If the power-up timeout is not important,

larger capacitors may be used, subject to the limitation

that the capacitor leakage current must not exceed 500nA,

or the function of the timer will be impaired.

⎯R⎯S⎯T Output Characteristics

The DC characteristics of the

⎯R⎯S⎯T pull-down strength

are shown in the Typical Performance Characteristics

section.

⎯R⎯S⎯T is an open-drain pin and thus requires an

external pull-up resistor to the logic supply.

⎯R⎯S⎯T may be

are observed.

The open-drain nature of the

⎯R⎯S⎯T pin allows for wired-OR

connection of several LTC2909s to monitor more than two

supplies (see Typical Applications). Other logic with open-

drain outputs may also connect to the

⎯R⎯S⎯T line, allowing

other logic-determined conditions to issue a reset.

As noted in the discussion of power up and power down,

the circuits that drive

0.15V at

⎯R⎯S⎯T .

ADJ1

LTC2909-2.5

REF

ADJ2

RST

SEL

10k

1.37M

15V

5V

–5V

–15V

3.3V

2.5V

133k

3.09M

107k

1.15M

137k

3.09M

115k

2.2nF

2.2nF

100nF

100nF

TMR

GND

ADJ1

LTC2909-3.3

REF

ADJ2

2909 TA02

RST

SEL

TMR

GND

SYSTEM

Six Supply Undervoltage Monitor with 2.5V Reset Output and 20ms Timeout

TYPICAL APPLICATIO S

±12V UV Monitor Powered from

12V, 20ms Timeout (1.8V Logic Out)

ADJ1

LTC2909-2.5

REF

681k

ADJ2

RST

SEL

TMR

M1

GND

13.7k

18.7k

169k

1.43M

36V TO 72V

1.91M

27k

0.25W

100nF

5V

10k

2909 TA03

M1, M2: FDG6301N OR SIMILAR

IF LOADING OF RST WILL EXCEED 1nF,

A 1nF BYPASS CAPACITOR ON M1’s

DRAIN IS RECOMMENDED

M2

SYSTEM

ADJ1

LTC2909-2.5

1.8V

REF

ADJ2

RST

SEL

107k

10k

FAULT

OUTPUT

2.2nF

2909 TA01b

1.07M

12V

–12V

49.9k

*OPTIONAL FOR ESD

MANUAL

RESET

PUSHBUTTON

100nF

2.49M

10k*

10k

TMR

GND

48V Telecom UV/OV Monitor with Hysteresis