LTC4215CUFD datasheet(9/24 Pages) LINER

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LTC4215

4215fb

PI FU CTIO S

per 1nF of soft-start capacitor to ensure proper start-up.

Use 1nF minimum to ensure an accurate inrush current.

TIMER: Start-Up Timer Input. Connect a capacitor be-

tween this pin and ground to set a 12.3ms/µF duration

for start-up, after which an overcurrent fault is logged if

the inrush is still current limited. The duration of the off

time is 600ms/µF when overcurrent auto-retry is enabled,

resulting in a 1:50 duty cycle. An internal timer provides

a 100ms start-up time and 5 seconds auto-retry time if

this pin is tied to INTVCC. Allow an additional 10nF of

timer capacitance per 1nF of soft-start (SS) capacitor to

ensure proper start-up. The minimum value for the TIMER

capacitor is 10nF.

UV: Undervoltage Comparator Input. Connect this pin

to an external resistive divider from VDD. If the voltage

at this pin falls below 1.227V, an undervoltage fault is

detected and the GATE turns off. Pulling this pin below

0.4V resets all faults and allows the GATE to turn back on.

Tie to INTVCC if unused.

VDD: Supply Voltage Input. This pin has an undervoltage

lockout threshold of 2.84V and overvoltage lockout

threshold of 15.6V.

1.235V

–

PWRGD

LOGIC

FAULT

GATE

SOURCE

FET ON

SENSE–

SENSE+ (QFN), VDD (SSOP)

FOLDBACK

AND dI/dt

RST

VDD

ADIN (QFN)

SDAI (QFN)

SDAO (QFN)

SDA (SSOP)

SCL

ALERT

OV (QFN)

(QFN)

0.4V

1.235V

µA

INTVCC

1.235V

2.84V

15.6V

1.235V

0.6V

RESET

OV1

TM1

UVLO2

TM2

OV2

UVLO1

VDD(UVLO)

CHARGE

PUMP AND

GATE DRIVER

GPI0

TIMER

–

0.2V

1.235V

VDD – VSENSE

I2C ADDR

SOURCE

A/D

CONVERTER

100

µA

2.64V

3.1V

GEN

µA

–

ADRO

ADR1 (QFN)

4215 BD

ADR2 (QFN)

INTVCC

–

I2C

1 OF 27

VCC

FU CTIO AL DIAGRA

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