AMIS-710651-A4: Color CIS Module

Data Sheet

7.0 Electro-Optical Characteristics (25

All tests were conducted at the typical pixel rate of 3.0MHz

Table 4: Electro-Optical Characteristics (25°C)

Parameter

Symbol

Typ.

Units

Note

Number of active photo detectors

5160

2580

Elements

600dpi

300dpi

Pixel-to-pixel spacing

42.3

84.6

µm

600dpi

300dpi

Line scan rate

TINT

(1)

~1.75

ms/line

@ 3.0MHz clock frequency

Clock frequency

FREQ

(2)

3.0

MHz

Pixel rate

PRATE

(2)

3.0

MHz

Bright output voltage

Vpavg

(3)

0.2

V

Bright output non-uniformity

+/- Up

(4)

< /-30

%

Bright output total non-uniformity

Uptotal

(5)

<60

%

Adjacent pixel non-uniformity

Uadj

(6)

<25

%

Dark non-uniformity

Ud

(7)

<150

mV

Dark output voltage range

VDL

(8)

1.2<VDL<1.5

V

Random noise

RNL

(9)

<24

<4

p-p mV

rms mV

Modulation transfer function

MTF

(10)

40

%

Notes:

(1)

Scan rate (integration time), TINT, is determined by the time interval between two SPs. See Table 3, Note 5.

(2)

Clock frequency, FREQ, is the input clock frequency and its corresponding PRATE is the pixel sample rate.

(3)

Bright output voltage Vpmax = maximum pixel value of Vp(n), Vpmin = minimum pixel value of Vp(n), Vpavg =

scan with the module scanning a uniform white target and Vp values are measured with a uniform exposure.

(4)

Bright output non-uniformity Up(+) = [(Vpmax - Vpavg) / Vpavg] x 100%, Up(-)= [(Vpavg - Vpmin) / Vpavg] x 100%, whichever polarity with the highest absolute

value is selected.

(5)

Bright output total non-uniformity: Uptotal = [Vpmax -Vpmin]/Vpavg x 100%

(6)

Adjacent pixel non-uniformity: Upadj = MAX[ | (Vp(n) - Vp(n+l) | / Vp(n))] x 100%

Upadj is the non-uniformity in percentage. It is the maximum difference amplitude between two neighboring pixels.

(7)

Dark non-uniformity: Ud = Vdmax – Vdmin

Vdmax is the max. pixel value of the video pixel in the dark. Vdmin is the min. pixel value of the video pixel in the dark. The references for these levels are the dark

level (VDL).

(8)

Dark output voltage range (VDL) is the level between the output dark level and ground.

(9)

Random noise (RNL): The rms value was calculated from measured p-p thermal noise taken at output from a selected pixel. The rms is defined as one standard

deviation of at least 64 pixels sampled. The calculation of the standard deviation is based on an idealized Gaussian probability curve.

(10) Modulation transfer function is defined as MTF = [(Vmax - Vmin) / (Vmax + Vmin)] x 100%. MTF is a measure at the glass surface. Vmax is the maximum output

voltage at 300lp/inch (at 1/2 of the optical Nyquest frequency) and Vmin is the minimum output voltage at 300lp/inch.

8.0 Electrical Clocking Characteristics

Table 5: Clock Amplitude Duty Characteristics (25

Parameter

Symbol

Min.

Typ.

Max.

Units

VIH

(1)

Clock input voltage

VIL

(1)

See Table 3

Clock frequency

FREQ

(2)

Note 3

3.0

4.0

MHz

Pixel rate

PRATE

(2)

~1.30

3.0

4.0

MHz

Line read time

TINT

(4)

45

~10

ms

Clock pulse duty cycle

Ratio = twp / tp

(5)

%

Notes:

(1)

The clocks, CP and SP are compatible with CMOS clock drivers.

(2)

FREQ is the clock frequency and PRATE is the pixel sample rate.

(3)

Minimum values are not specified because it will be determined by the maximum TINT value. See Note 4.

(4)

TINT is the line scan read time, which depends on the interval between the SP entries. The minimum time is determined by (1/clock frequency) x (5160 +

150) pixels. Note that there are a few extra pixels used to determine the typical line time of 820µsec @ 3.0MHz PRATE (see Figure 1). There are 55 clocks

required to transfer and reset the photo-sites before the video can be scanned out. The longest integration time is determined by the degree of leakage

current degradation that can be tolerated by the system. A 10ms maximum is a typical rule-of-thumb. An experienced CIS user can use his discretion and

determine the desired tolerance level for the given system.

(5)

The definition for the symbols used in the ratio is defined in

Figure 1. A duty cycle of exactly 50 percent is recommended to maintain equal pixel duration

between odd and even pixels.

3

AMI Semiconductor – Aug. 06, M-20609-001

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