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A19300LUBATN-RWBGA Datasheet(PDF) 15 Page - Allegro MicroSystems

Part # A19300LUBATN-RWBGA
Description  ASIL-Compliant Hall-Effect Wheel Speed Sensor IC with Speed and Direction Output
PDF  17 Pages
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Manufacturer  ALLEGRO [Allegro MicroSystems]
Direct Link  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

A19300LUBATN-RWBGA Datasheet(HTML) 15 Page - Allegro MicroSystems

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ASIL-Compliant Hall-Effect Wheel Speed Sensor IC
with Speed and Direction Output
A19300
15
Allegro MicroSystems
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
The device must be operated below the maximum junction tem-
perature of the device (TJ(max)). Under certain combinations of
peak conditions, reliable operation may require derating supplied
power or improving the heat dissipation properties of the appli-
cation. This section presents a procedure for correlating factors
affecting operating TJ. (Thermal data is also available on the
Allegro MicroSystems website.)
The Package Thermal Resistance (RθJA) is a figure of merit sum-
marizing the ability of the application and the device to dissipate
heat from the junction (die), through all paths to the ambient air.
Its primary component is the Effective Thermal Conductivity
(K) of the printed circuit board, including adjacent devices and
traces. Radiation from the die through the device case (RθJC) is
a relatively small component of RθJA. Ambient air temperature
(TA) and air motion are significant external factors, damped by
overmolding.
The effect of varying power levels (Power Dissipation or PD), can
be estimated. The following formulas represent the fundamental
relationships used to estimate TJ, at PD.
PD = VIN
× IIN
(1)
Δ
T = PD
× RθJA
(2)
TJ = TA + ΔT
(3)
For example, given common conditions such as: TA= 25°C,
VCC = 12 V, ICC = 7.15 mA, and RθJA = 213°C/W, then:
PD = VCC
× ICC = 12 V × 7.15 mA = 85.8 mW
Δ
T = PD
× RθJA = 85.8 mW × 213°C/W = 18.3°C
TJ = TA + ΔT = 25°C + 18.3°C = 43.3°C
A worst-case estimate, PD(max), represents the maximum allow-
able power level (VCC(max), ICC(max)), without exceeding TJ(max),
at a selected RθJA and TA.
Example: Reliability for VCC at TA=150°C, package UB, using
minimum-K PCB.
Observe the worst-case ratings for the device, specifically:
RθJA=213°C/W, TJ(max) =165°C, VCC(max)= 24 V, and
ICC(AVG) = 14.8 mA. ICC(AVG) is computed using ICC(HIGH)(max)
and ICC(LOW)(max), with a duty cycle of 84% computed from
tw(REV)(max) on-time and tw(PRE)(min) off-time (pulse width proto-
col).
Calculate the maximum allowable power level (PD(max)). First,
invert equation 3:
Δ
Tmax = TJ(max) – TA = 165°C–150°C = 15°C
This provides the allowable increase to TJ resulting from internal
power dissipation. Then, invert equation 2:
PD(max) = ΔTmax÷RθJA =15°C÷213°C/W=70.4mW
Finally, invert equation 1 with respect to voltage:
VCC(est) = PD(max) ÷ ICC(AVG)= 70.4mW÷14.8mA=4.8 V
The result indicates that, at TA, the application and device can
dissipate adequate amounts of heat at voltages ≤VCC(est).
Compare VCC(est) to VCC(max). If VCC(est) ≤ VCC(max), then reli-
able operation between VCC(est) and VCC(max) requires enhanced
RθJA. If VCC(est) ≥ VCC(max), then operation between VCC(est) and
VCC(max) is reliable under these conditions.
POWER DERATING



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