PIC18F2420/2520/4420/4520

DS80209D-page 12

© 2005 Microchip Technology Inc.

EXAMPLE 6:

PIC18 LOW PRIORITY INTERRUPT SERVICE ROUTINE

Note:

These instructions are required based on the function of the ISR. If the only code in the ISR is to reload

Timer1, then they are not required, but may be required if additional code is added.

ISR @ 0x0018

; (3-4Tcy), fixed interrupt latency

MOVFF

STATUS, STATUS_TEMP

; (2Tcy), save STATUS register

MOVFF

WREG, WREG_TEMP

; (2Tcy), save working register, refer to note 1

MOVFF

BSR, BSR_TEMP

; (2Tcy), save BSR register, refer to note 1

BTFSS

PIR1, TMR1IF

; (2Tcy), did a Timer1 overflow occur?

BRA

EXIT

; No

BSF

TMR1H, 7

; (1Tcy) Yes, reload for a 1 second overflow

EXIT

MOVFF

BSR_TEMP, BSR

;restore BSR register, refer to note 1

MOVFF

WREG_TEMP, WREG

;restore working register, refer to note 1

MOVFF

STATUS_TEMP, STATUS

;restore STATUS register

RETFIE