TDA8003TSSLASHC2 datasheet(9/24 Pages) PHILIPS

9 / 24 page

2000 Apr 20

Philips Semiconductors

Product speciﬁcation

I2C-bus SIM card interface

TDA8003TS

DC-to-DC converter

The whole circuit is powered by VDDS, except for the

VCC generator, the other card contact buffers and the

interface signals.

The DC-to-DC converter acts as a doubler or a tripler,

depending on the supply voltage VDD and the card supply

voltage VCC. There are basically four possible situations:

• VDD = 3 V and VCC = 3 V. The DC-to-DC converter acts

as a doubler with a regulation of VVUP at approximately

4.5 V

• VDD = 3 V and VCC = 5 V. The DC-to-DC converter acts

as a tripler with a regulation of VVUP at approximately

6.5 V

• VDD = 5 V and VCC = 3 V. The DC-to-DC converter is

disabled and VDD is applied to pin VUP

• VDD = 5 V and VCC = 5 V. The DC-to-DC converter acts

as a doubler with a regulation of VVUP at approximately

6.5 V.

The supply voltage is recognized by the TDA8003TS at

approximately 3.75 V for the C1 and 3.3 V for the C2.

When a card session is requested by the microcontroller,

the sequencer will first start the DC-to-DC converter, which

is a switched capacitor type, clocked by an internal

oscillator at a frequency fosc of approximately 2.5 MHz.

The output voltage VVUP is regulated at approximately

4.5 or 6.5 V and subsequently fed to the VCC generator.

VCC and PGND are used as a reference for all other card

contacts.

Power-down mode

The Power-down mode is used for current consumption

reduction when the card is in Sleep mode.

To enter Power-down mode, the microcontroller must first

select CLK in this mode (stop LOW, stop HIGH or

1.25 MHz from the internal oscillator) with bits CLKPD1

and CLKPD2. Subsequently, the microcontroller sends the

command PDOWN, CLK is switched to the value

predefined by bits CLKPD1 and CLKPD2, and SIMCLK

may be stopped (HIGH or LOW).

If the selected CLK is stopped, the biasing currents in the

buffers to the card will be reduced. The voltage supervisor

and all control functions also remain active. The maximum

current taken by the card in this mode when CLK is

stopped is assumed to be less than 5 mA.

Before leaving the Power-down mode, the clock signal

must first be applied to SIMCLK, and then bit PDOWN

must be set to logic 0.

Off mode

The Off mode is entered when the PWROFF signal is

LOW. In this mode, no function is valid. This mode avoids

switching off the power supply of the device, and gives a

current consumption less than 2

µA. Before entering the

Off mode, the card must be deactivated.

The Off mode is resumed when the PWROFF signal

returns to HIGH. This re-initializes the voltage supervisor,

and has the same effect as a reset of the device. As long

as the device is not ready to operate, the SIMERR signal

will remain LOW.

Sequencer and clock counter

The sequencer handles the ensuring activation and

deactivation sequences in accordance with GSM11.11

and ISO 7816, even in case of emergency (card take-off,

short circuit and supply drop-out). The sequencer is

clocked with the internal oscillator frequency fosc.

The activation is initiated with the START command (only

if the card is present, and if the voltage supervisor does not

detect a fault on the supply). During activation, VCC goes

HIGH and subsequently I/O is enabled and CLK is started

with RST = LOW. The clock counter counts the CLK

pulses till a start bit is detected on I/O.

After 45000 CLK pulses for the C1 (44745 for the C2), if no

start bit on I/O has been detected, the sequencer toggles

RST to HIGH, and counts again 45000 CLK pulses

(44745 for the C2). If, again, no start bit has been

detected, SIMERR will be pulled LOW and the information

of bit MUTE is set in the status register.

If a start bit has been detected during the two 45000 CLK

pulse slots (44745 for the C2), the clock counter is

stopped, RST is kept at the same level and the session

can go on between the card and the system.

The clock counter does not take care of any start bit during

the 200 first CLK pulses of both slots; if a start bit is

detected between 200 and 352 CLK pulses of both slots,

then SIMERR will be pulled LOW and the information of

bit EARLY is set in the status register.

The deactivation is initiated either by the microcontroller

(STOP command), or automatically by the TDA8003TS in

case of card take-off, short circuit or supply voltage

drop-out detected by the voltage supervisor. During

deactivation, RST will go LOW, CLK is stopped, I/O is

disabled and VCC goes LOW.

TDA8003TS/C2 Datasheet(PDF) 9 Page - NXP Semiconductors

TDA8003TS/C2 Datasheet(HTML) 9 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

Datasheet Download

Link URL