PX3SE datasheet(14/54 Pages) ROCKCHIP

14 / 54 page

PX3 SE Datasheet

Rev 1.2

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8bits CCIR656(PAL/NTSC) interface

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8bits raw data interface

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YUV422 data input format with adjustable YUV sequence

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YUV422,YUV420 output format with separately Y and UV space

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Support image crop with arbitrary windows



Display Interface

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Support HDMI 1.4 output up to 1080P@60Hz

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TV Interface: ITU-R BT.656(8-bit, 480i/576i/1080i),TV encoder 10bit out for DAC,

RGB888+1080i for HDMI, Parallel RGB HDMI interface:24-bit(RGB888 YCbCr444)

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Max output resolution 1920x1080 for HDMI, 480i/576i for CVBS

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4 display layers :



One background layer with programmable 24bits color



One video layer (win0)

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RGB888, ARGB888, RGB565, YCbCr422, YCbCr420, YCbCr444

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maximum resolution is 1920x1080,support virtual display

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1/8 to 8 scaling up/down engine with arbitrary non-integer ratio

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256 level alpha blending(pre-multiplied alpha support)

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Support transparency color key

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De-flicker support for interlace output

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Direct path support

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YCbCr2RGB(rec601-mpeg/rec601-jpeg/rec709)

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RGB2YCbCr(BT601/BT709)



One video layer (win1)

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RGB888, ARGB888, RGB565

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Support virtual display

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256 level alpha blending (pre-multiplied alpha support)



Support transparency color key

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Direct path support

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RGB2YCbCr(BT601/BT709)



Hardware cursor(win3)

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8BPP (ARGB888 LUT)

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Support two size: 32x32 and 64x64

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256 level alpha blending

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Support hwc over panel at right and below side

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Win0 and Win1 layer overlay exchangeable

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3 x 256 x 8 bits display LUTs

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Support replication(16bits to 24bits) and dithering(24bits to 16bits/ 18bits)

operation

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Blank and blank display

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Scaler



Output for RGB (max up to 1024x768), not support interlace

1.1.12 LVDS

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Up to 135MHz clock support

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28:4 data sub channel compression at data rates up to 945 Mbps per channel

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Support VGA, SVGA, XGA and WXGA and 24bit display

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PLL requires no external components

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Comply with the standard TIA/EIA-644-A LVDS standard

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Support alternative LVDS output or LVTTL output

1.1.13 MIPI DPHY



Embedded 1 MIPI DPHY for TX



Support 4 data lane

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Support WXGA 1280x800 @60fps output

PX3SE Datasheet(PDF) 14 Page - Rockchip Electronics Co., Ltd

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