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M68HC08 Datasheet(PDF) 102 Page - Freescale Semiconductor, Inc |
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M68HC08 Datasheet(HTML) 102 Page - Freescale Semiconductor, Inc |
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102 / 288 page  System Integration Module (SIM) Data Sheet MC68HC908BD48 — Rev. 2.1 102 System Integration Module (SIM) Freescale Semiconductor Table 7-4. Interrupt Sources Source Flag Mask1 INT Register Flag Priority2 Vector Address Reset None None None 0 $FFFE–$FFFF SWI Instruction None None None 0 $FFFC–$FFFD IRQ pin IRQF IMASK IF1 1 $FFFA–$FFFB USB TBEF TBIE IF2 2 $FFF8–$FFF9 RBFF RBIE EOPIF EOPIE RSTIF RSTIE TXD1F TXD1IE DDC12AB ALIF DIEN IF3 3 $FFF6–$FFF7 NAKIF RXIF TXIF SCLIF SCLIEN Reserved — — — — $FFF4–$FFF5 TIM channel 0 CH0F CH0IE IF5 5 $FFF2–$FFF3 TIM channel 1 CH1F CH1IE IF6 6 $FFF0–$FFF1 TIM overflow TOF TOIE IF7 7 $FFEE–$FFEF Sync processor VSIF VSIE IF8 8 $FFEC–$FFED LVSIF LVSIE Multi-master IIC MMALIF MMIEN IF9 9 $FFEA–FFEB MMNAKIF MMRXIF MMTXIF ADC conversion complete COCO AIEN IF10 10 $FFE8–$FFE9 Reserved — — — — $FFE6–$FFE7 1. The I bit in the condition code register is a global mask for all interrupts sources except the SWI instruction. 2. 0 = highest priority |
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