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LTM8080 Datasheet(PDF) 12 Page - Analog Devices |
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LTM8080 Datasheet(HTML) 12 Page - Analog Devices |
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12 / 32 page ![]() LTM4703 12 Rev. 0 For more information www.analog.com PG (Pin F2): Output Power Good Indicator. The PG pin is the open-drain output of an internal comparator. The PG pin remains low until the VOSNS pin is within ±7.5% of the final regulation voltage, and there are no fault conditions. The PG is also pulled low when RUN is below 1V, INTVCC has fallen too low, SVIN is too low, or during the thermal shutdown. The PG pin is valid when SVIN is above 3V. SW (Pin F6): Switching node of the LTM4703. This pin is for test purposes only. Do not load the SW pin with external circuitry. CLKOUT (Pin F7): Output Clock Signal for PolyPhase® Operation. The CLKOUT pin provides a 50% duty-cycle square wave of the switching frequency. The phase of CLKOUT with respect to the LTM4703 internal clock is determined by the state of the PHMODE pin. The CLKOUT’s peak-to-peak amplitude is INTVCC to GND. Float this pin if the CLKOUT function is not used. SYNC (Pin G6): This pin programs three different oper- ating modes: 1) Pulse-skipping mode (PSM). Connect this pin to GND for PSM to improve efficiency at light loads. 2) Forced continuous mode (FCM). This mode offers fast transient response and full-frequency oper- ation over a wide load range. Connect this pin high to INTVCC (~3.4V) or an external supply >3V for FCM. The LTM4703 operates in this mode by default if this pin is left floating. 3) Synchronization mode. Drive this pin with a clock source synchronized to an external clock and put the LTM4703 in FCM. PIN FUNCTIONS BLOCK DIAGRAM VIN VOUT 0.82µH 49.9k COUT RPGSET CIN 1.21k 47nF 1µF 0.1µF ×2 CURRENT MODE CONTROLLER VIN SVIN VOUT PGSET AGND SW RT SET GND RUN INTVCC COMPa COMPb CLKOUT SYNC PHMODE VOSNS TSENSE+ TSENSE– PG 0.1µF ×2 4703 BD 3.4V |
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