LTM8080 datasheet(23/32 Pages) AD

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LTM4703

Rev. 0

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PCB Layout

Most of the headaches associated with the PCB layout

have been alleviated, or even eliminated by the high level

of integration of the LTM4703. The LTM4703 is neverthe-

less a switching power supply, and care must be taken to

minimize EMI and ensure proper operation. Even with the

high level of integration, you may fail to achieve specified

operation with a haphazard or poor layout. See Figure 9

for a suggested layout. Ensure that the grounding and

heat sinking are acceptable.

A few rules to keep in mind are:

1. Place CSET, RSET, and RT as close as possible to their

respective pins.

2. Place the CIN capacitor as close as possible to the PVIN/

SVIN and GND connection of the LTM4703.

3. Place the COUT capacitor as close as possible to the

VOUT and GND connection of the LTM4703.

4. Place the CIN, and COUT capacitors such that their

ground current flows directly adjacent to or underneath

the LTM4703.

5. Connect all the GND connections to a copper pour or

plane area as large as possible on the top layer. Avoid

breaking the ground connection between the external

components and the LTM4703.

6. Use vias to connect the GND copper area to the board’s

internal ground planes. Liberally distribute these GND

vias to provide both a good ground connection and

thermal path to the internal planes of the printed cir-

cuit board. Pay attention to the location and density of

the thermal vias in Figure 9. The LTM4703 can benefit

from the heat sinking supplied by vias that connect to

internal GND planes at these locations, caused by their

proximity to the internal power handling components.

The optimum number of thermal vias depends upon

the printed circuit board design. For example, a board

might use very small holes. It should employ more

thermal vias than a board, which uses larger holes.

VIN

VOUT

GND

VOUT

4703 F09

RPGSET

Figure 9. Layout Showing Suggested External Components, GND Plane and Thermal Vias

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