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PT7C4050ADE Datasheet(PDF) 1 Page - Pericom Semiconductor Corporation |
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PT7C4050ADE Datasheet(HTML) 1 Page - Pericom Semiconductor Corporation |
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1 / 13 page ![]() ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| PT0239L (06/07) Ver: 0 1 Data Sheet PT7C4050 PLL with Integrated VCXO Features • PLL with quartz stabilized VCXO • Crystal output jitter less than 20ps • Dual redundant reference input clocks with loss of signal detection • Manual or automatic switch over between reference input clocks • VCXO provides smooth output transition during switch over of input clocks • Lock detection • Selectable metal mask options for phase detectors, op. Amps, and charge pump • Loss of signals alarm • Return to nominal clock upon LOS • Input data rates from 8 kb/s to 40 Mb/s • Tri-state output • User defined PLL loop response • NRZ data compatible • +3.3 and +5.0V supply voltage Description The device is composed of phase-lock loop with integrated VCXO for use in clock recovery, data re- timing, frequency translation and clock smoothing applications in telecom and datacom systems. Crystal Frequencies Supported: 12.624~38.880MHz. Ordering Information Part Number Package PT7C4050xDE Die form PT7C4050xLE Lead free 28-Pin TSSOP Note: Pls see below specification of part no. Applications • Frequency translation • Clock Smoothing, Clock Switching • NRZ Clock Recovery • Optical Switching/Routing, Base Station |
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