35 / 46 page
Rev: 13 September 2005
Class 2 Bluetooth module - F2M03C2
Datasheet
6.4.8 PCM Timing Information
PCM Master Timing
Symbol
Parameter
Mi n
(1)
Typ
Max
(2)
Unit
fmclk
PCMCLK frequency
-
128
256
512
-
kHz
-
PCM_SYNC frequency
-
8
kHz
tmclkh
(1)
PCM_CLK high
980
-
-
ns
tmclkl
(1)
PCM_CLK low
730
-
ns
tdmclksynch
Delay time from PCM_CLK high to
PCM_SYNC high
-
-
20
ns
tdmclkpout
Delay time from PCM_CLK high to valid
PCM_OUT
-
-
20
ns
tdmclklsyncl
Delay time from PCM_CLK low to
PCM_SYNC low (Long Frame Sync
only)
-
-
20
ns
tdmclkhsyncl
Delay time from PCM_CLK high to
PCM_SYNC low
-
-
20
ns
tdmclklpoutz
Delay time from PCM_CLK low to
PCMOUT high impedance
-
-
20
ns
tdmclkhpoutz
Delay time from PCM_CLK high to
PCMOUT high impedance
-
-
20
ns
tsupinclkl
Set-up time for PCM_IN valid to
PCM_CLK low
30
-
-
ns
thpinclkl
Hold time for PCM_CLK low to PCM_IN
invalid
30
-
-
ns
tr
Edge rise time (Cl = 50 pf, 10-90 %)
-
-
15
ns
tf
Edge fall time (Cl = 50 pf, 10-90 %)
-
-
15
ns
Note:
(1) Assumes normal system clock operation. Figures will vary during low power modes, when system clock speeds are reduced.
(2) Valid for temperatures between -40°C and +105°C
PCM Master Timing
© 2003 Free2move AB
Page 35(46)
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