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CS4351 Datasheet(PDF) 25 Page - Cirrus Logic

Part # CS4351
Description  192 kHz Stereo DAC with 2 Vrms Line Out
PDF  37 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4351 Datasheet(HTML) 25 Page - Cirrus Logic

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DS566F1
25
CS4351
6.2.3
Functional Mode (FM) Bits 1-0
Default = 00
00 - Auto speed mode detect
01 - Single-Speed Mode (4 to 50 kHz sample rates)
10 - Double-Speed Mode (50 to 100 kHz sample rates)
11 - Quad-Speed Mode (100 to 200 kHz sample rates)
Function:
Selects the required range of input sample rates or DSD Mode.
6.3
Volume Mixing and Inversion Control - Register 03h
6.3.1
Channel A Volume = Channel B Volume (VOLB=A) Bit 7
Function:
When set to 0 (default) the AOUTA and AOUTB volume levels are independently controlled by the A and
the B Channel Volume Control Bytes.
When set to 1 the volume on both AOUTA and AOUTB are determined by the A Channel Attenuation and
Volume Control Bytes, and the B Channel Bytes are ignored.
6.3.2
Invert Signal Polarity (Invert_A) Bit 6
Function:
When set to 1, this bit inverts the signal polarity of channel A.
When set to 0 (default), this function is disabled.
6.3.3
Invert Signal Polarity (Invert_B) Bit 5
Function:
When set to 1, this bit inverts the signal polarity of channel B.
When set to 0 (default), this function is disabled.
B7
B6
B5
B4
B3
B2
B1
B0
VOLB=A
INVERT A
INVERT B
Reserved
ATAPI3
ATAPI2
ATAPI1
ATAPI0
0
0
0
010
01



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