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AD9627PCB Datasheet(PDF) 5 Page - Analog Devices |
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AD9627PCB Datasheet(HTML) 5 Page - Analog Devices |
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5 / 40 page  Preliminary Technical Data AD9627 Rev. PrA | Page 5 of 40 ADC AC SPECIFICATIONS AVDD = 1.8 V, DVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input, 1.0 V internal reference, DCS Enabled, Fast Detect Outputs disabled, Signal Monitor disabled, unless otherwise noted. Table 2. AD9627BCPZ-80 AD9627BCPZ-105 AD9627BCPZ-125 AD9627BCPZ-150 Parameter Temp Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit SIGNAL-TO-NOISE-RATIO (SNR) fIN = 2.4 MHz 25°C 69.5 69.5 69.5 69.5 dB Full dB fIN = 70 MHz 25°C 69.5 69.5 69.5 69.5 dB Full TBD TBD TBD TBD dB fIN = 100 MHz 25°C 69.4 69.4 69.4 69.4 dB fIN = 170 MHz 25°C 68.9 68.9 68.9 68.9 dB SIGNAL-TO-NOISE-AND DISTORTION (SINAD) fIN = 2.4 MHz 25°C 69.2 69.2 69.2 69.2 dB Full dB fIN = 70 MHz 25°C 69.2 69.2 69.2 69.2 dB Full TBD TBD TBD TBD dB fIN = 100 MHz 25°C 69.1 69.1 69.1 69.1 dB fIN = 170 MHz 25°C 68.6 68.6 68.6 68.6 dB EFFECTIVE NUMBER OF BITS (ENOB) fIN = 2.4 MHz 25°C 11.4 11.4 11.4 11.4 Bits fIN = 70 MHz 25°C 11.4 11.4 11.4 11.4 Bits fIN = 100 MHz 25°C 11.4 11.4 11.4 11.4 Bits fIN = 170 MHz 25°C 11.3 11.3 11.3 11.3 Bits WORST SECOND OR THIRD HARMONIC fIN = 2.4 MHz 25°C 90 90 90 90 dBc Full dBc fIN = 70 MHz 25°C 85 85 85 85 dBc Full dBc fIN = 100 MHz 25°C 85 85 85 83 dBc fIN = 170 MHz 25°C 83.5 83.5 83.5 82 dBc SPURIOUS-FREE DYNAMIC RANGE (SFDR) fIN = 2.4 MHz 25°C 90 90 90 90 dBc Full dBc fIN = 70 MHz 25°C 85 85 85 85 dBc Full dBc fIN = 100 MHz 25°C 85 85 85 83 dBc fIN = 170 MHz 25°C 84 83.4 83 80 dBc TWO TONE SFDR fIN = 30 MHz, 31 MHz (−7 dBFS ) 25°C TBD TBD TBD TBD dBc fIN = 170 MHz, 171 MHz (−7 dBFS ) 25°C TBD TBD TBD TBD dBc CROSSTALK Full 95 95 95 95 dB ANALOG INPUT BANDWIDTH 25°C 650 650 650 650 MHz MATCHING CHARACTERISTIC Offset Error 25°C TBD TBD TBD TBD %FSR Gain Error 25°C TBD TBD TBD TBD %FSR 1 Measured with a low input frequency, full-scale sine wave, with approximately 5 pF loading on each output bit. 2 Input capacitance refers to the effective capacitance between one differential input pin and AGND. Refer to Figure x for the equivalent analog input structure. 3 Standby power is measured with a dc input, the CLK pin inactive (set to AVDD or AGND). |
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