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RT1050 Datasheet(PDF) 12 Page - NXP Semiconductors

Part # RT1050
Description  i.MX RT1050 Crossover Processors Data Sheet for Industrial Products
PDF  115 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
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RT1050 Datasheet(HTML) 12 Page - NXP Semiconductors

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i.MX RT1050 Crossover Processors Data Sheet for Industrial Products, Rev. 2, 03/2021
12
NXP Semiconductors
Modules list
FlexIO1
FlexIO2
Flexible Input/output
Connectivity and
Communications
The FlexIO is capable of supporting a wide range of
protocols including, but not limited to: UART, I2C, SPI,
I2S, camera interface, display interface, PWM
waveform generation, etc. The module can remain
functional when the chip is in a low power mode
provided the clock it is using remain active.
FlexPWM1
FlexPWM2
FlexPWM3
FlexPWM4
Pulse Width Modulation
Timer Peripherals
The pulse-width modulator (PWM) contains four PWM
sub-modules, each of which is set up to control a single
half-bridge power stage. Fault channel support is
provided. The PWM module can generate various
switching patterns, including highly sophisticated
waveforms.
FlexRAM
RAM
Memories
The i.MX RT1050 has 512 KB of on-chip RAM which
could be flexible allocated to I-TCM, D-TCM, and
on-chip RAM (OCRAM) in a 32 KB granularity. The
FlexRAM is the manager of the 512 KB on-chip RAM
array. Major functions of this blocks are: interfacing to
I-TCM and D-TCM of Arm core and OCRAM controller;
dynamic RAM arrays allocation for I-TCM, D-TCM, and
OCRAM.
FlexSPI
Quad Serial Peripheral
Interface
Connectivity and
Communications
FlexSPI acts as an interface to one or two external
serial flash devices, each with up to four bidirectional
data lines.
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
General Purpose I/O
Modules
System Control
Peripherals
Used for general purpose input/output to external ICs.
Each GPIO module supports up to 32 bits of I/O.
GPT1
GPT2
General Purpose Timer
Timer Peripherals
Each GPT is a 32-bit “free-running” or “set and forget”
mode timer with programmable prescaler and compare
and capture register. A timer counter value can be
captured using an external event and can be configured
to trigger a capture event on either the leading or trailing
edges of an input pulse. When the timer is configured to
operate in “set and forget” mode, it is capable of
providing precise interrupts at regular intervals with
minimal processor intervention. The counter has output
compare logic to provide the status and interrupt at
comparison. This timer can be configured to run either
on an external clock or on an internal clock.
KPP
Keypad Port
Human Machine
Interfaces
The KPP is a 16-bit peripheral that can be used as a
keypad matrix interface or as general purpose
input/output (I/O). It supports 8 x 8 external key pad
matrix. Main features are:
• Multiple-key detection
• Long key-press detection
• Standby key-press detection
• Supports a 2-point and 3-point contact key matrix
Table 2. i.MX RT1050 modules list (continued)
Block Mnemonic
Block Name
Subsystem
Brief Description



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