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STAC9759 Datasheet(PDF) 16 Page - Integrated Device Technology

Part # STAC9759
Description  HIGH-PERFORMANCE 6-CHANNEL AC??7 2.3 CODEC WITH UNIVERSAL JACKS
PDF  119 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

STAC9759 Datasheet(HTML) 16 Page - Integrated Device Technology

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STAC9758/9759
HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™
PC AUDIO
IDT™
16
STAC9758/9759
V 1.2 1206
HIGH-PERFORMANCE 6-CHANNEL AC’97 2.3 CODEC WITH UNIVERSAL JACKS™
Note:
1.
With +30 dB Boost on, 1.00 Vrms with Boost off.
2.
Ratio of Full Scale signal to noise output with -60dB signal, measured “A weighted” over a 20 Hz to a 20 KHz bandwidth.
3.
± 1dB limits for Line Output & 0 dB gain, at -20dBV
4.
Ratio of Full Scale signal to THD+N output with -3dB signal, measured “A weighted” over a 20 Hz to a 20 KHz bandwidth.
48 KHz Sample Frequency
5.
Ratio of Full Scale signal to idle channel noise output is measured “A weighted” over a 20 Hz to a 20 KHz bandwidth.
(AES17-1991 Idle Channel Noise or EIAJ CP-307 Signal-to-noise Ratio).
6.
Peak-to-Peak Ripple over Passband meets ± 0.25dB limits, 48 KHz Sample Frequency.
7.
Stop Band rejection determines filter requirements. Out-of-Band rejection determines audible noise.
8.
The integrated Out-of-Band noise generated by the DAC process, during normal PCM audio playback, over a bandwidth
28.8 to 100 KHz, with respect to a 1 Vrms DAC output.
Deviation from Linear Phase
-
-
1
deg.
LINE_OUT/MONO_OUT Load Resistance
10
-
-
K
Ω
LINE_OUT/MONO_OUT Load Capacitance
-
-
50
pF
HEADPHONE_OUT Load Resistance
-
32
-
Ω
HEADPHONE_OUT Load Capacitance
-
-
100
pF
Mute Attenuation
-
96
-
dB
PLL lock time
-
100
200
µsec
PLL 24.576MHz clock jitter
-
-
750
psec
PLL frequency multiplication tolerance
-
-
12.5
ppm
Parameter
Min
Typ
Max
Unit



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