PM5366-PI datasheet(260/267 Pages) PMC

260 / 267 page

PRELIMINARY

PM5366 TEMAP-84

DATASHEET

PMC-2010672

ISSUE 1

HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER

AND M13 MULTIPLEXER

PROPRIETARY AND CONFIDENTIAL

248

Table 55

- Transmit Line Interface Timing (Figure 73)

Symbol

Description

Min

Max

Units

CTCLK Frequency

(Must be integer multiple of 8 KHz.)

0.008 2.048

MHz

tHCTCLK

CTCLK High Duration

tLCTCLK

CTCLK Low Duration

Figure 73

- Transmit Line Interface Timing

CTCLK

t H

CTCLK

Notes on Ingress and Egress Serial Interface Timing:

1. High pulse width is measured from the 1.4 Volt points of the rise and fall

ramps. Low pulse width is measured from the 1.4 Volt points of the fall and

rise ramps.

2. When a set-up time is specified between an input and a clock, the set-up

time is the time in nanoseconds from the 1.4 Volt point of the input to the 1.4

Volt point of the clock.

3. When a hold time is specified between an input and a clock, the hold time is

the time in nanoseconds from the 1.4 Volt point of the clock to the 1.4 Volt

point of the input.

4. Setup, hold, and propagation delay specifications are shown relative to the

default active clock edge, but are equally valid when the opposite edge is

selected as the active edge.

5. Output propagation delay time is the time in nanoseconds from the 1.4 Volt

point of the reference signal to the 1.4 Volt point of the output.

6. Output propagation delays are measured with a 50 pF load on all outputs with

the exception of the high speed DS3/E3 outputs (TCLK[3:1],

PM5366-PI Datasheet(PDF) 260 Page - PMC-Sierra, Inc

PM5366-PI Datasheet(HTML) 260 Page - PMC-Sierra, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL