PM5366-PI datasheet(38/267 Pages) PMC

38 / 267 page

PRELIMINARY

PM5366 TEMAP-84

DATASHEET

PMC-2010672

ISSUE 1

HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER

AND M13 MULTIPLEXER

PROPRIETARY AND CONFIDENTIAL

events (FERF, MERR, FERR, PERR, RAI, framing word errors) are still indicated

while the DS2 framer is indicating OOF, based on the previous alignment.

Each of the seven 6312 kbit/s multiplexers per DS3 may be independently

configured to multiplex and demultiplex four 1544 kbit/s DS1s or three

2048 kbit/s according to ITU-T Rec. G.747 into and out of a DS2 formatted

signal. Tributary frequency deviations are accommodated using internal FIFOs

and bit stuffing. The C-bits are set appropriately, with the option of inserting DS1

loopback requests. Interrupts can be generated upon detection of loopback

requests in the received DS2. AIS may be inserted in any of the low speed

tributaries in both multiplex and demultiplex directions.

When configured as a DS3 or E3 framer the unchannelized payload of the DS3

and E3 links are available to an external device.

The SONET/SDH line side interface provides STS-1 SPE synchronous payload

envelope processing and generation, TUG3 tributary unit group processing and

generation within a VC4 virtual container and VC3 virtual container processing

and generation. The payload processor aligns and monitors the performance of

SONET virtual tributaries (VTs) or SDH tributary units (TUs). Maintenance

functions per tributary include detection of loss of pointer, AIS alarm, tributary

path signal label mismatch and tributary path signal label unstable alarms.

Optionally interrupts can be generated due to the assertion and removal of any

of the above alarms. Counts are accumulated for tributary path BIP-2 errors on a

block or bit basis and for FEBE indications. The synchronous payload envelope

generator generates all tributary pointers and calculates and inserts tributary

path BIP-2. The generator also inserts FEBE, RDI and enhanced RDI in the V5

byte. Software can force AIS insertion on a per tributary basis.

A SONET/SDH mapper maps and demaps up to 84 T1s, 63 E1s or three DS3s

into three STS-1 SPEs, TUG3s or VC3s through three elastic stores. The fixed

stuff (R) bits are all set to zeros or ones under microprocessor control. The bit

asynchronous demapper performs majority vote C-bit decoding to detect stuff

requests for T1, E1 and DS3 asynchronous mappings. The VT1.5/VT2/TU-

11/TU-12 mapper uses an elastic store and a jitter attenuator capability to

minimize jitter introduced via bit stuffing.

The TEMAP-84 is configured, controlled and monitored via a generic 8-bit

microprocessor bus through which all internal registers are accessed. All

sources of interrupts can be masked and acknowledged through the

microprocessor interface.

PM5366-PI Datasheet(PDF) 38 Page - PMC-Sierra, Inc

PM5366-PI Datasheet(HTML) 38 Page - PMC-Sierra, Inc

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