PM5366-PI datasheet(92/267 Pages) PMC

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PRELIMINARY

PM5366 TEMAP-84

DATASHEET

PMC-2010672

ISSUE 1

HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER

AND M13 MULTIPLEXER

PROPRIETARY AND CONFIDENTIAL

While the DS3-FRMR is synchronized to the DS3 M-frame, the F-bit and M-bit

positions in the DS3 stream are examined. An out-of-frame defect is detected

when 3 F-bit errors out of 8 or 16 consecutive F-bits are observed (as selected

by the M3O8 bit in the DS3 FRMR Configuration Register), or when one or more

M-bit errors are detected in 3 out of 4 consecutive M-frames. The M-bit error

criteria for OOF can be disabled by the MBDIS bit in the DS3 Framer

Configuration register. The 3 out of 8 consecutive F-bits out-of-frame ratio

provides more robust operation, in the presence of a high bit error rate, than the

3 out of 16 consecutive F-bits ratio. Either out-of-frame criteria allows an out-of-

frame defect to be detected quickly when the M-subframe alignment patterns or,

optionally, when the M-frame alignment pattern is lost.

Also while in-frame, line code violations, M-bit or F-bit framing bit errors, and P-

bit parity errors are indicated. When C-bit parity mode is enabled, both C-bit

parity errors and far end block errors are indicated. These error indications, as

well as the line code violation and excessive zeros indication, are accumulated

over 1 second intervals with the Performance Monitor (DS3-PMON). Note that

the framer is an off-line framer, indicating both OOF and COFA events. Even if

an OOF is indicated, the framer will continue indicating performance monitoring

information based on the previous frame alignment.

Three DS3 maintenance signals (a RED alarm condition, the alarm indication

signal, and the idle signal) are detected by the DS3-FRMR. The maintenance

detection algorithm employs a simple integrator with a 1:1 slope that is based on

the occurrence of "valid" M-frame intervals. For the RED alarm, an M-frame is

said to be a "valid" interval if it contains a RED defect, defined as an occurrence

of an OOF or LOS event during that M-frame. For AIS and IDLE, an M-frame

interval is "valid" if it contains AIS or IDLE, defined as the occurrence of less than

15 discrepancies in the expected signal pattern (1010... for AIS, 1100... for IDLE)

while valid frame alignment is maintained. This discrepancy threshold ensures

the detection algorithms operate in the presence of a 10-3 bit error rate. For AIS,

the expected pattern may be selected to be: the framed "1010" signal; the

framed arbitrary DS3 signal and the C-bits all zero; the framed "1010" signal and

the C-bits all zero; the framed all-ones signal (with overhead bits ignored); or the

unframed all-ones signal (with overhead bits equal to ones). Each "valid" M-

frame causes an associated integration counter to increment; "invalid" M-frames

cause a decrement. With the "slow" detection option, RED, AIS, or IDLE are

declared when the respective counter saturates at 127, which results in a

detection time of 13.5 ms. With the "fast" detection option, RED, AIS, or IDLE

are declared when the respective counter saturates at 21, which results in a

detection time of 2.23 ms (i.e., 1.5 times the maximum average reframe time).

RED, AIS, or IDLE are removed when the respective counter decrements to 0.

DS3 Loss of Frame detection is provided as recommended by ITU-T G.783 with

programmable integration periods of 1ms, 2ms, or 3ms. While integrating up to

PM5366-PI Datasheet(PDF) 92 Page - PMC-Sierra, Inc

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